ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 965
ATSAM3U-EK
Manufacturer Part Number
ATSAM3U-EK
Description
KIT EVAL FOR AT91SAM3U CORTEX
Manufacturer
Atmel
Type
MCUr
Datasheets
1.ATSAM3U-EK.pdf
(2 pages)
2.ATSAM3U-EK.pdf
(61 pages)
3.ATSAM3U-EK.pdf
(1171 pages)
4.ATSAM3U-EK.pdf
(53 pages)
Specifications of ATSAM3U-EK
Contents
Board
Processor To Be Evaluated
SAM3U
Data Bus Width
32 bit
Interface Type
RS-232, USB
Operating Supply Voltage
3 V
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
SAM3U4E
Silicon Family Name
SAM3U
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT91SAM3U
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3U-EK
Manufacturer:
Atmel
Quantity:
10
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39.6.9
39.6.10
39.6.11
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
Speed Identification
USB V2.0 High Speed Global Interrupt
Endpoint Interrupts
The high speed reset is managed by the hardware.
At the connection, the host makes a reset which could be a classic reset (full speed) or a high
speed reset.
At the end of the reset process (full or high), the ENDRESET interrupt is generated.
Then the CPU should read the SPEED bit in UDPHS_INTSTAx to ascertain the speed mode of
the device.
Interrupts are defined in
in
Interrupts are enabled in UDPHS_IEN (see
and individually masked in UDPHS_EPTCTLENBx (see
Control Enable
Table 39-5.
SHRT_PCKT
BUSY_BANK
NAK_OUT
NAK_IN/ERR_FLUSH
STALL_SNT/ERR_CRISO/ERR_NB_TRA
RX_SETUP/ERR_FL_ISO
TX_PK_RD /ERR_TRANS
TX_COMPLT
RX_BK_RDY
ERR_OVFLW
MDATA_RX
DATAX_RX
Section 39.7.4 ”UDPHS Interrupt Status Register”
Endpoint Interrupt Source Masks
Register”).
Section 39.7.3 ”UDPHS Interrupt Enable Register”
Section 39.7.3 ”UDPHS Interrupt Enable
Short Packet Interrupt
NAKOUT Interrupt
NAKIN/Error Flush Interrupt
Stall Sent/CRC error/Number of Transaction
Error Interrupt
Received SETUP/Error Flow Interrupt
Transmitted IN Data Complete Interrupt
Received OUT Data Interrupt
Overflow Error Interrupt
MDATA Interrupt
DATAx Interrupt
Busy Bank Interrupt
TX Packet Read/Transaction Error Interrupt
(UDPHS_INTSTA).
Section 39.7.12 ”UDPHS Endpoint
SAM3U Series
SAM3U Series
(UDPHS_IEN) and
Register”)
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