ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 999
ATSAM3U-EK
Manufacturer Part Number
ATSAM3U-EK
Description
KIT EVAL FOR AT91SAM3U CORTEX
Manufacturer
Atmel
Type
MCUr
Datasheets
1.ATSAM3U-EK.pdf
(2 pages)
2.ATSAM3U-EK.pdf
(61 pages)
3.ATSAM3U-EK.pdf
(1171 pages)
4.ATSAM3U-EK.pdf
(53 pages)
Specifications of ATSAM3U-EK
Contents
Board
Processor To Be Evaluated
SAM3U
Data Bus Width
32 bit
Interface Type
RS-232, USB
Operating Supply Voltage
3 V
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
SAM3U4E
Silicon Family Name
SAM3U
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT91SAM3U
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3U-EK
Manufacturer:
Atmel
Quantity:
10
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39.7.17
Name:
Address:
Access:
• FRCESTALL: Stall Handshake Request
0 = no effect.
1= If set a STALL answer will be done to the host for the next handshake.
This bit is reset by hardware upon received SETUP.
• TOGGLESQ_STA: Toggle Sequencing
Toggle Sequencing:
Notes:
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
SHRT_PCKT
NAK_OUT
These bits are set by hardware to indicate the PID data of the current bank:
Value
– IN endpoint: it indicates the PID Data Toggle that will be used for the next packet sent. This is not relative to
– CONTROL and OUT endpoint:
31
23
15
0
1
2
3
7
TOGGLESQ_STA
the current bank.
1. In OUT transfer, the Toggle information is meaningful only when the current bank is busy (Received OUT Data = 1).
2. These bits are updated for OUT transfer:
3. For High Bandwidth Isochronous Out endpoint, it is recommended to check the UDPHS_EPTSTAx/ERR_TRANS bit to know
4. This field is reset to DATA1 by the UDPHS_EPTCLRSTAx register TOGGLESQ bit, and by UDPHS_EPTCTLDISx (disable
UDPHS Endpoint Status Register
-
-
if the toggle sequencing is correct or not.
endpoint).
a new data has been written into the current bank.
the user has just cleared the Received OUT Data bit to switch to the next bank.
UDPHS_EPTSTAx [x=0..6]
0x400A411C [0], 0x400A413C [1], 0x400A415C [2], 0x400A417C [3], 0x400A419C [4], 0x400A41BC [5],
0x400A41DC [6]
Read-only
Name
DATA0
DATA1
DATA2
MDATA
ERR_FLUSH
NAK_IN/
30
22
14
6
BYTE_COUNT
Description
DATA0
DATA1
Data2 (only for High Bandwidth Isochronous Endpoint)
MData (only for High Bandwidth Isochronous Endpoint)
ERR_CRISO/
ERR_NBTRA
STALL_SNT/
FRCESTALL
29
21
13
5
ERR_FL_ISO
RX_SETUP/
28
20
12
4
–
BYTE_COUNT
TX_PK_RDY/
ERR_TRANS
27
19
11
BUSY_BANK_STA
3
–
TX_COMPLT
26
18
10
2
–
RX_BK_RDY/
KILL_BANK
SAM3U Series
SAM3U Series
25
17
CURRENT_BANK/
9
1
–
CONTROL_DIR
ERR_OVFLW
24
16
8
0
–
999
999
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