C8051F120DK Silicon Laboratories Inc, C8051F120DK Datasheet - Page 19

• Manufacturer Part Number: C8051F120DK
• Description: DEVKIT-F120/21/22/23/24/25/26/27
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F120DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F12x and C8051F13x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F120
• Silicon Family Name: C8051F12x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F120, 121, 122, 123, 124, 125, 126, 127
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1224

1.
The C8051F12x and C8051F13x device families are fully integrated mixed-signal System-on-a-Chip
MCUs with 64 digital I/O pins (100-pin TQFP) or 32 digital I/O pins (64-pin TQFP).
Highlighted features are listed below. Refer to Table 1.1 for specific product feature selection.
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With on-chip V
are truly stand-alone System-on-a-Chip solutions. All analog and digital peripherals are enabled/disabled
and configured by user firmware. The Flash memory can be reprogrammed even in-circuit, providing non-
volatile data storage, and also allowing field upgrades of the 8051 firmware.
On-board JTAG debug circuitry allows non-intrusive (uses no on-chip resources), full speed, in-circuit
debugging using the production MCU installed in the final application. This debug system supports inspec-
tion and modification of memory and registers, setting breakpoints, watchpoints, single stepping, run and
halt commands. All analog and digital peripherals are fully functional while debugging using JTAG.
Each MCU is specified for operation over the industrial temperature range (–45 to +85 °C). The Port I/O,
RST, and JTAG pins are tolerant for input signals up to 5 V. The devices are available in 100-pin TQFP or
64-pin TQFP packaging. Table 1.1 lists the specific device features and package offerings for each part
number. Figure 1.1 through Figure 1.6 show functional block diagrams for each device.
High-Speed pipelined 8051-compatible CIP-51 microcontroller core (100 MIPS or 50 MIPS)
In-system, full-speed, non-intrusive debug interface (on-chip)
True 12 or 10-bit 100 ksps ADC with PGA and 8-channel analog multiplexer
True 8-bit 500 ksps ADC with PGA and 8-channel analog multiplexer (C8051F12x Family)
Two 12-bit DACs with programmable update scheduling (C8051F12x Family)
2-cycle 16 by 16 Multiply and Accumulate Engine (C8051F120/1/2/3 and C8051F130/1/2/3)
128 or 64 kB of in-system programmable Flash memory
8448 (8 k + 256) bytes of on-chip RAM
External Data Memory Interface with 64 kB address space
SPI, SMBus/I2C, and (2) UART serial interfaces implemented in hardware
Five general purpose 16-bit Timers
Programmable Counter/Timer Array with 6 capture/compare modules
On-chip Watchdog Timer, V
System Overview
DD
monitor, Watchdog Timer, and clock oscillator, the C8051F12x and C8051F13x devices
DD
Monitor, and Temperature Sensor
Rev. 1.4
C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
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