C8051F120DK Silicon Laboratories Inc, C8051F120DK Datasheet - Page 290

DEVKIT-F120/21/22/23/24/25/26/27

C8051F120DK

Manufacturer Part Number
C8051F120DK
Description
DEVKIT-F120/21/22/23/24/25/26/27
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet

Specifications of C8051F120DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F12x and C8051F13x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F120
Silicon Family Name
C8051F12x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F120, 121, 122, 123, 124, 125, 126, 127
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1224

Available stocks

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C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
The Timer 1 overflow rate is determined by the Timer 1 clock source (T1CLK) and reload value (TH1). The
frequency of T1CLK is selected as described in
Timer 1 overflow rate is calculated as shown in Equation 21.2.
When Timers 2, 3, or 4 are selected as a baud rate source, the baud rate is generated as shown in
Equation 21.3.
The overflow rate for Timer 2, 3, or 4 is determined by the clock source for the timer (TnCLK) and the 16-
bit reload value stored in the RCAPn register (n = 2, 3, or 4), as shown in Equation 21.4.
290
Equation 21.3. Mode 1 Baud Rate using Timer 2, 3, or 4
Timer234_OverflowRate
Mode1_BaudRate
Equation 21.4. Timer 2, 3, or 4 Overflow Rate
Timer1_OverflowRate
Equation 21.2. Timer 1 Overflow Rate
=
1 16
Section “23.1. Timer 0 and Timer 1” on page 309
Rev. 1.4
=
=
TnCLK
T1CLK
Timer234_OverflowRate
65536 RCAPn
256 TH1
. The

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