OM11014 NXP Semiconductors, OM11014 Datasheet - Page 46
![BOARD EVAL FOR LPC2919](/photos/9/21/92179/om11014_sml.jpg)
OM11014
Manufacturer Part Number
OM11014
Description
BOARD EVAL FOR LPC2919
Manufacturer
NXP Semiconductors
Series
Keilr
Type
MCUr
Datasheet
1.OM11014.pdf
(67 pages)
Specifications of OM11014
Contents
Board, Cable, CD
For Use With/related Products
LPC2919
Lead Free Status / RoHS Status
Not applicable / Not applicable
Other names
568-4360
NXP Semiconductors
LPC2917_19_1
Product data sheet
8.8.5.3 RGU pin description
8.8.6.1 Overview
8.8.6 Power Management Unit (PMU)
Table 25.
The RGU module in the LPC2917/19 has the following pins.
pins.
Table 26.
This module enables software to actively control the system’s power consumption by
disabling clocks not required in a particular operating mode.
Using the base clocks from the CGU as input, the PMU generates branch clocks to the
rest of the LPC2917/19. Output clocks branched from the same base clock are phase-
and frequency-related. These branch clocks can be individually controlled by software
programming.
Reset output
POR_RST
RGU_RST
PCR_RST
COLD_RST
WARM_RST
SCU_RST
CFID_RST
FMC_RST
EMC_RST
SMC_RST
GESS_A2V_RST
PESS_A2V_RST
GPIO_RST
UART_RST
TMR_RST
SPI_RST
IVNSS_A2V_RST
IVNSS_CAN_RST
IVNSS_LIN_RST
MSCSS_A2V_RST
MSCSS_PWM_RST
MSCSS_ADC_RST
MSCSS_TMR_RST
VIC_RST
AHB_RST
Symbol
RST_N
Reset output configuration
RGU pins
Direction
IN
Reset source
power-on reset module
POR_RST, RST_N pin
RGU_RST, WATCHDOG
PCR_RST
COLD_RST
COLD_RST
COLD_RST
COLD_RST
COLD_RST
COLD_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
Rev. 01 — 31 July 2008
Description
external reset input, active LOW; pulled up internally
Parts of the device reset when activated
LP_OSC; is source for RGU_RST
RGU internal; is source for PCR_RST
PCR internal; is source for COLD_RST
parts with COLD_RST as reset source below
parts with WARM_RST as reset source below
SCU
CFID
embedded Flash Memory Controller (FMC)
embedded SRAM Memory Controller
external Static Memory Controller (SMC)
GeSS AHB-to-APB bridge
PeSS AHB-to-APB bridge
all GPIO modules
all UART modules
all Timer modules in PeSS
all SPI modules
IVNSS AHB-to-APB bridge
all CAN modules including Acceptance filter
all LIN modules
MSCSS AHB to APB bridge
all PWM modules
all ADC modules
all Timer modules in MSCSS
Vectored Interrupt Controller (VIC)
CPU and AHB Bus infrastructure
ARM9 microcontroller with CAN and LIN
Table 26
LPC2917/19
shows the RGU
© NXP B.V. 2008. All rights reserved.
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