C8051F300DK Silicon Laboratories Inc, C8051F300DK Datasheet - Page 7

DEV KIT F300/301/302/303/304/305

C8051F300DK

Manufacturer Part Number
C8051F300DK
Description
DEV KIT F300/301/302/303/304/305
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F300DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F30x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F300
Silicon Family Name
C8051F30x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051 F300/001/002
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1246
5.3. Expansion I/O Connector (J1)
The 12-pin Expansion I/O connector J1 provides access to all signal pins of the C8051F300 device. Pins for +3V, dig-
ital ground and the output of an on-board low-pass filter are also available. A small through-hole prototyping area is
also provided. All I/O signals routed to connector J1 are also routed to through-hole connection points between J1
and the prototyping area (see Figure 2 on page 5). Each connection point is labeled indicating the signal available at
the connection point. See Table 2 for a list of pin descriptions for J1.
5.4. Target Board DEBUG Interface (J4)
The DEBUG connector (J4) provides access to the DEBUG (C2) pins of the C8051F300. It is used to connect the
Serial Adapter to the target board for in-circuit debugging and Flash programming. Table 3 shows the DEBUG pin
definitions.
Table 3. DEBUG Connector Pin Descriptions
2, 3, 9
Pin #
8,10
1
4
5
6
7
Table 2. J1 Pin Descriptions
Pin #
10
12
11
1
2
3
4
5
6
7
8
9
+3VD (+3.3VDC)
+3 VD (+3.3 VDC)
Rev. 0.5
GND (Ground)
Description
/RST (Reset)
Not Connected
PWM Output
GND (Ground)
Description
/RST (Reset)
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
C2CK
C2D
P3.0
C8051F30x-DK
7

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