C8051F005DK Silicon Laboratories Inc, C8051F005DK Datasheet - Page 124

DEV KIT FOR F005/006/007

C8051F005DK

Manufacturer Part Number
C8051F005DK
Description
DEV KIT FOR F005/006/007
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet

Specifications of C8051F005DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F01x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F005
Silicon Family Name
C8051F00x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051 F005/006/007
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1188

Available stocks

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17.1.
The four signals used by the SPI (MOSI, MISO, SCK, NSS) are described below.
17.1.1. Master Out, Slave In
The master-out, slave-in (MOSI) signal is an output from a master device and an input to slave devices. It is used to
serially transfer data from the master to the slave. Data is transferred most-significant bit first.
17.1.2. Master In, Slave Out
The master-in, slave-out (MISO) signal is an output from a slave device and an input to the master device. It is used
to serially transfer data from the slave to the master.
places the MISO pin in a high-impedance state when the slave is not selected.
17.1.3. Serial Clock
The serial clock (SCK) signal is an output from the master device and an input to slave devices. It is used to
synchronize the transfer of data between the master and slave on the MOSI and MISO lines.
17.1.4. Slave Select
The slave select (NSS) signal is an input used to select the SPI module when in slave mode by a master, or to
disable the SPI module when in master mode. When in slave mode, it is pulled low to initiate a data transfer and
remains low for the duration of the transfer.
Signal Descriptions
Master
Device
Figure 17.2. Typical SPI Interconnection
Device
Slave
NSS
Rev. 1.7
Device
Slave
NSS
Data is transferred most-significant bit first. A SPI slave
Device
Slave
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
NSS
VDD
MISO
MOSI
SCK
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