C8051F410DK Silicon Laboratories Inc, C8051F410DK Datasheet - Page 249

• Manufacturer Part Number: C8051F410DK
• Description: KIT DEV FOR C8051F41X
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F410DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F41x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F410
• Silicon Family Name: C8051F41x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F41x
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1314

25. Programmable Counter Array (PCA0)
The Programmable Counter Array (PCA0) provides enhanced timer functionality while requiring less CPU
intervention than the standard 8051 counter/timers. The PCA consists of a dedicated 16-bit counter/timer
and six 16-bit capture/compare modules. Each capture/compare module has its own associated I/O line
(CEXn) which is routed through the Crossbar to Port I/O when enabled (See
Crossbar Decoder” on page 149
a programmable timebase that can select between seven sources: system clock, system clock divided by
four, system clock divided by twelve, the external oscillator clock source divided by 8, smaRTClock Clock
divided by 8, Timer 0 overflow, or an external clock signal on the ECI input pin. Each capture/compare
module may be configured to operate independently in one of six modes: Edge-Triggered Capture, Soft-
ware Timer, High-Speed Output, Frequency Output, 8-Bit PWM, or 16-Bit PWM (each mode is described in
Section “25.2. Capture/Compare Modules” on page 251
through the system controller's Special Function Registers. The PCA block diagram is shown in
Figure 25.1
Important Note: The PCA Module 5 may be used as a watchdog timer (WDT), and is enabled in this mode
following a system reset. Access to certain PCA registers is restricted while WDT mode is enabled .
See
Section 25.3
Capture/Compare
Module 0
SYSCLK/12
Timer 0 Overflow
SYSCLK
External Clock/8
smaRTClock/8
SYSCLK/4
ECI
for details.
Capture/Compare
Module 1
CLOCK
MUX
PCA
Figure 25.1. PCA Block Diagram
for details on configuring the Crossbar). The counter/timer is driven by
16-Bit Counter/Timer
Capture/Compare
Module 2
Crossbar
Port I/O
Rev. 1.1
Capture/Compare
). The PCA is configured and controlled
Module 3
C8051F410/1/2/3
Capture/Compare
Module 4
Section “18.1. Priority
Capture/Compare
Module 5
249