R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 119

• Manufacturer Part Number: R0K561622S000BE
• Description: KIT STARTER FOR H8SX/1622
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K561622S000BE

• Contents: Board, Cables, CD, Debugger, Power Supply
• Silicon Manufacturer: Renesas
• Features: Coding And Debugging, E10A Emulator, RS232 Serial Connection
• Kit Contents: Board
• Silicon Family Name: H8SX/1622F
• Silicon Core Number: R5F61622N50LGV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: H8SX/1622
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

5.3.1
When the RES pin goes high after being held low for the necessary time, this LSI starts reset
exception handling as follows:
1. The internal state of the CPU and the registers of the on-chip peripheral modules are
2. The reset exception handling vector address is read and transferred to the PC, and program
Figures 5.1 and 5.2 show examples of the reset sequence.
5.3.2
If an interrupt is accepted after a reset but before the stack pointer (SP) is initialized, the PC and
CCR will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests,
including NMI, are disabled immediately after a reset. Since the first instruction of a program is
always executed immediately after the reset state ends, make sure that this instruction initializes
the stack pointer (example: MOV.L #xx: 32, SP).
initialized, VBR is cleared to H'00000000, the T bit is cleared to 0 in EXR, and the I bits are
set to 1 in EXR and CCR.
execution starts from the address indicated by the PC. In this case, by reading the flags in the
registers of individual functions, it is possible to determine whether the particular internal reset
has been issued based on the watchdog timer or the external interrupt during deep software
standby mode. For details, see section 4, Resets, section 15, Watchdog Timer (WDT), and
section 24, Power-Down Modes.
Reset Exception Handling
Interrupts after Reset
Rev. 2.00 Sep. 16, 2009 Page 89 of 1036
Section 5 Exception Handling
REJ09B0414-0200