R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 715

• Manufacturer Part Number: R0K561622S000BE
• Description: KIT STARTER FOR H8SX/1622
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K561622S000BE

• Contents: Board, Cables, CD, Debugger, Power Supply
• Silicon Manufacturer: Renesas
• Features: Coding And Debugging, E10A Emulator, RS232 Serial Connection
• Kit Contents: Board
• Silicon Family Name: H8SX/1622F
• Silicon Core Number: R5F61622N50LGV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: H8SX/1622
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

17.3.1
ICCRA enables or disables I
master or slave mode, transmission or reception, and transfer clock frequency in master mode.
Bit
7
6
5
4
3
2
1
0
Bit
Bit Name
Initial Value
R/W
Bit Name
ICE
RCVD
MST
TRS
CKS3
CKS2
CKS1
CKS0
I
2
C Bus Control Register A (ICCRA)
R/W
ICE
7
0
Initial
Value R/W
0
0
0
0
0
0
0
0
RCVD
R/W
6
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
2
C bus interface, controls transmission or reception, and selects
Description
I
0: This module is halted (SCL and SDA pins are used as the
1: This bit is enabled for transfer operations (SCL and SDA pins
Reception Disable
This bit enables or disables the next operation when TRS is 0
and ICDRR is read.
0: Enables next reception
1: Disables next reception
Master/Slave Select
Transmit/Receive Select
When arbitration is lost in master mode, MST and TRS are both
reset by hardware, causing a transition to slave receive mode.
Modification of the TRS bit should be made between transfer
frames.
Operating modes are described below according to MST and
TRS combination.
00: Slave receive mode
01: Slave transmit mode
10: Master receive mode
11: Master transmit mode
Transfer Clock Select 3 to 0
These bits are valid only in master mode. Make setting
according to the required transfer rate. For details on the
transfer rate, see table 17.2.
2
C Bus Interface Enable
MST
R/W
port function)
are bus drive state)
5
0
TRS
R/W
4
0
CKS3
R/W
3
0
Rev. 2.00 Sep. 16, 2009 Page 685 of 1036
Section 17 I
CKS2
R/W
2
0
2
C Bus Interface 2 (IIC2)
CKS1
R/W
1
0
REJ09B0414-0200
CKS0
R/W
0
0