R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 736

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Section 17 I
17.4.6
The logic levels at the SCL and SDA pins are routed through the noise cancelers before being
latched internally. Figure 17.13 shows a block diagram of the noise canceler circuit.
The noise canceler consists of two cascaded latches and a match detector. The signal input to SCL
(or SDA) is sampled on the system clock, but is not passed forward to the next circuit unless the
outputs of both latches agree. If they do not agree, the previous value is held.
Rev. 2.00 Sep. 16, 2009 Page 706 of 1036
REJ09B0414-0200
(Master output)
(Master output)
(Slave output)
(Slave output)
processing
ICDRS
ICDRR
RDRF
SDA
SDA
SCL
SCL
User
Sampling clock
Noise Canceler
SDA input
SCL input
2
C Bus Interface 2 (IIC2)
or
Figure 17.12 Slave Receive Mode Operation Timing 2
A
9
System clock period
Figure 17.13 Block Diagram of Noise Canceler
Sampling clock
D
Bit 7
1
Latch
C
Bit 6
Data 1
2
Q
Bit 5
3
D
Bit 4
Sampling
4
clock
Latch
C
Bit 3
5
[3] Set ACKBT
Q
Bit 2
6
Bit 1
7
Compare
detection
match
circuit
[3] Read ICDRR
Bit 0
8
A
Internal SCL
internal SDA
9
or
[4] Read ICDRR
Data 1
Data 2

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