R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 781

• Manufacturer Part Number: R0K561622S000BE
• Description: KIT STARTER FOR H8SX/1622
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K561622S000BE

• Contents: Board, Cables, CD, Debugger, Power Supply
• Silicon Manufacturer: Renesas
• Features: Coding And Debugging, E10A Emulator, RS232 Serial Connection
• Kit Contents: Board
• Silicon Family Name: H8SX/1622F
• Silicon Core Number: R5F61622N50LGV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: H8SX/1622
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

19.3.5
DSADOF0 to DSADOF3 specify the values to be input to the DAC for canceling the offsets of
analog input channels 0 to 3. Offset cancellation here means cancellation of the DC components of
signals input to analog input channels 0 to 3, not cancellation of the offset of the internal amplifier.
Settings of the DSADOF registers can only be changed while the ADST bit is clear.
The six higher-order bits are reserved (fixed at 0) and cannot be written to. The settable values for
the analog level for offset cancellation differ depending on the gain setting. Table 19.2 shows the
settable values of DSADOFn for each gain setting.
The analog level for offset cancellation that corresponds to the register setting is calculated by
using formula (1). Table 19.3 shows examples of register values and calculated analog levels for
offset cancellation.
DOF = DSADOF/2
Table 19.2 Setting Values of Gain and DSADOFn
GAIN1, GAIN0
B'00
B'01
B'10
B'11
DOF:
DSADOF:
AVrefT:
AVrefB:
Bit
Bit Name
Initial Value:
R/W:
∆Σ A/D Offset Cancel DAC Inputs 0 to 3 (DSADOF0 to DSADOF3)
15

R
0
Analog level for offset cancellation (V)
Register value set in DSADOFn[9:0] for the corresponding channel
∆Σ reference voltage (high) (V), AVrefT = AVccA
∆Σ reference voltage (low), AVrefB = AvssA
14

R
0
10
Settable Range
H'0200
H'0200
H'0000 to H'03FE
H'0000 to H'03FF
× ( AVrefT - AVrefB )
13

R
0
12

R
0
11

R
0
10

R
0
R/W
9
0
R/W
DSADOFn (n = 0 to 3)
8
0
… Formula (1)
R/W
Remarks
Bit 0 must be clear (= 0)

Always set to H'0200.
Always set to H'0200.
7
0
R/W
Rev. 2.00 Sep. 16, 2009 Page 751 of 1036
6
0
R/W
5
0
R/W
4
0
Section 19 ∆Σ A/D Converter
R/W
3
0
R/W
2
0
REJ09B0414-0200
R/W
1
0
R/W
0
0