R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 788

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Section 19 ∆Σ A/D Converter
19.4.4
In scan mode, A/D conversion is executed continuously for the specified analog input channels as
follows. A/D conversion for up to six analog input channels can be specified by setting the CH0 to
CH5 bits in DSADCSR to 1, indicating the required channels.
1. A/D conversion for the selected channels is started by a software instruction setting the ADST
2. When A/D conversion is completed for channel n, the result is transferred to the corresponding
3. When A/D conversion for all of the selected channels has been completed, the ADF bit in
4. The ∆Σ A/D converter starts another round of A/D conversion in order of precedence from
5. If the ADST bit is cleared to 0 during A/D conversion, the conversion is stopped and the ∆Σ
Rev. 2.00 Sep. 16, 2009 Page 758 of 1036
REJ09B0414-0200
bit in DSADCSR to 1 or input of the trigger signal selected by the TRGS1 and TRGS0 bits in
DSADCSR. When multiple channels have been selected, execution of A/D conversion is in
order of rising channel number, so the order of precedence starts from channel 0.
∆Σ A/D data register (DSADDRn, n = 0 to 5).
DSADCSR is set to 1. If the setting of the ADIE bit in DSADCSR is 1 at this time, a DSADI
interrupt request is also generated.
channel 0. The ADST bit is not cleared automatically, and steps 2 to 4 are repeated as long as
ADST = 1.
A/D converter enters the idle state. When the ADST bit is subsequently set to 1, A/D
conversion for the selected channels again proceeds from channel 0.
Scan Mode

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