C8051F120-TB Silicon Laboratories Inc, C8051F120-TB Datasheet - Page 248
C8051F120-TB
Manufacturer Part Number
C8051F120-TB
Description
BOARD PROTOTYPING W/C8051F120
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F120-TB
Contents
Board
Processor To Be Evaluated
C8051F12x and C8051F13x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F120
Silicon Family Name
C8051F12x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F120
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F120-TB
Manufacturer:
Silicon Labs
Quantity:
135
- Current page: 248 of 350
- Download datasheet (2Mb)
C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
248
Bits7–0: P0.[7:0]: Port0 Output Latch Bits.
Note:
Bits7–0: P0MDOUT.[7:0]: Port0 Output Mode Bits.
Note:
P0.7
R/W
R/W
Bit7
Bit7
(Write - Output appears on I/O pins per XBR0, XBR1, and XBR2 Registers)
0: Logic Low Output.
1: Logic High Output (open if corresponding P0MDOUT.n bit = 0).
(Read - Regardless of XBR0, XBR1, and XBR2 Register settings).
0: P0.n pin is logic low.
1: P0.n pin is logic high.
0: Port Pin output mode is configured as Open-Drain.
1: Port Pin output mode is configured as Push-Pull.
P0.7 (/WR), P0.6 (/RD), and P0.5 (ALE) can be driven by the External Data Memory Interface.
See
more information. See also SFR Definition 18.3 for information about configuring the Crossbar
for External Memory accesses.
SDA, SCL, and RX0 (when UART0 is in Mode 0) and RX1 (when UART1 is in Mode 0) are
always configured as Open-Drain when they appear on Port pins.
Section “17. External Data Memory Interface and On-Chip XRAM” on page 219
P0.6
R/W
R/W
Bit6
Bit6
SFR Definition 18.5. P0MDOUT: Port0 Output Mode
P0.5
R/W
R/W
Bit5
Bit5
SFR Definition 18.4. P0: Port0 Data
P0.4
R/W
R/W
Bit4
Bit4
Rev. 1.4
P0.3
R/W
R/W
Bit3
Bit3
P0.2
R/W
R/W
Bit2
Bit2
P0.1
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
SFR Page:
SFR Page:
P0.0
R/W
R/W
Bit0
Bit0
0x80
All Pages
0xA4
F
Addressable
00000000
Reset Value
Reset Value
11111111
Bit
for
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