MSC8156ADS Freescale Semiconductor, MSC8156ADS Datasheet - Page 27

BOARD ADS FOR MSC8156

MSC8156ADS

Manufacturer Part Number
MSC8156ADS
Description
BOARD ADS FOR MSC8156
Manufacturer
Freescale Semiconductor
Type
DSPr
Datasheet

Specifications of MSC8156ADS

Contents
Board
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
Yes
For Use With/related Products
MSC8156
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The FPGA supports all the MSC8156 hardware configuration modes:
When RCW = ‘001’ or ‘010’, the configuration word originates from either the small or big I
EEPROM. The FPGA selects the suitable part as per the RCW value.
Freescale Semiconductor
RCW_SRC[0:2]
100 and 101
000
001
010
011
SEL_RCW_LSEL[3:0]
MSC815x
RCW_SRC[0:2]
I
2
Multiplexed external RCW
Hard Coded Configuration
C
External 22-bits (reduced)
Small I
Configuration Word
Big I
Figure 2-13. General Configuration Scheme
Table 2-5. MSC8156 Configuration Modes
Source Type
SRST
PRST
HRST
2
MSC8156ADS Reference Manual, Rev. 2.1
loading
2
C EEPROM
Word
C EEPROM
Monitor
Volt
The whole 64-bit configuration word sampled
previously from the DIP-switches is driven by FPGA
in four cycles by 16- bit each time. The MSC8156
RCW_LSEL[3–0] output selects the appropriate
configuration bits subset.
The small EEPROM applies address 0x50 to provide
configuration data. Configuration DIP-switches
don’t care.
The big EEPROM applies address 0x50 to provide
configuration data. Configuration DIP-switches
don’t care.
At first the FPGA samples 22 appropriate
DIP-switches. At the second time interval the data is
driven to the MSC8156.
Only RCW_SRC three bits are driven the rest
configuration DIP-switches don’t care.
I
2
C EEPROM
FPGA
Reg. Array
BCSR
0
1
2
3
4
5
6
7
1,2
Description
Reset Operation and Configuration
2
C
2-15

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