C8051F015DK-J Silicon Laboratories Inc, C8051F015DK-J Datasheet - Page 61
C8051F015DK-J
Manufacturer Part Number
C8051F015DK-J
Description
DEV KIT F015/F016/F017/F018/F019
Manufacturer
Silicon Laboratories Inc
Datasheet
1.C8051F005-TB.pdf
(171 pages)
Specifications of C8051F015DK-J
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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VDD = 3.0V, AV+ = 3.0V, -40C to +85C unless otherwise specified.
INTERNAL REFERENCE (REFBE = 1)
Output Voltage
VREF Short Circuit Current
VREF Power Supply
Current (supplied by AV+)
VREF Temperature
Coefficient
Load Regulation
VREF Turn-on Time1
VREF Turn-on Time2
VREF Turn-on Time3
EXTERNAL REFERENCE (REFBE = 0)
Input Voltage Range
Input Current
Note 1: The reference can only source current. When driving an external load, it is recommended to add a load
61
Bits7-3: UNUSED. Read = 00000b; Write = don’t care
Bit2:
Bit1:
Bit0:
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
R/W
Bit7
PARAMETER
-
resistor to AGND.
TEMPE: Temperature Sensor Enable Bit
0: Internal Temperature Sensor Off.
1: Internal Temperature Sensor On.
BIASE: Bias Enable Bit for ADC and DAC’s
0: Internal Bias Off.
1: Internal Bias On (required for use of ADC or DAC’s).
REFBE: Internal Voltage Reference Buffer Enable Bit
0: Internal Reference Buffer Off. System reference can be driven from external source on
1: Internal Reference Buffer On. System reference provided by internal voltage reference.
VREF pin.
R/W
Bit6
-
Figure 9.2. REF0CN: Reference Control Register
Table 9.1. Reference Electrical Characteristics
R/W
Bit5
25C ambient
Load = (0-to-200A) to AGND (Note 1)
4.7F tantalum, 0.1F ceramic bypass
0.1F ceramic bypass
no bypass cap
-
R/W
Bit4
CONDITIONS
-
Rev. 1.7
R/W
Bit3
-
TEMPE
R/W
Bit2
MIN
2.34
1.00
BIASE
R/W
Bit1
TYP
2.43
0.5
50
15
20
10
2
0
REFBE
R/W
Bit0
(AV+)
– 0.3V
MAX
2.50
30
1
00000000
SFR Address:
Reset Value
ppm/A
0xD1
ppm/C
UNITS
mA
A
A
ms
s
s
V
V
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