MC44BS373CAFCEVK Freescale Semiconductor, MC44BS373CAFCEVK Datasheet - Page 30
MC44BS373CAFCEVK
Manufacturer Part Number
MC44BS373CAFCEVK
Description
KIT EVAL FOR BS373CAFC 16PIN
Manufacturer
Freescale Semiconductor
Datasheet
1.MC44BS373CAD.pdf
(52 pages)
Specifications of MC44BS373CAFCEVK
Main Purpose
Audio Video Integration Modulator
Utilized Ic / Part
MC44BS373CA
Interface Type
I2C
Operating Temperature Range
+ 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MC44BS373CA
High Speed I2C Compatible Bus
High Speed I2C Compatible Bus
The bus receiver operates the I
In write mode, each ninth data bit (bits 9, 18, 27, 36, and 45) is an acknowledge bit (ACK) during which
the MCU sends a logic 1 and the modulator circuit answers on the data line by pulling it low. Besides the
chip address, the circuit needs 2 or 4 data bytes for operation. The sequences of data bytes shown in Table 31
are the permitted incoming information.
After the chip address (CA), 2 or 4 data bytes may be received.
The first and third data bytes contain a function bit, which lets the IC distinguish between frequency
information and control information. If the function bit is a logic 1, the two following bytes contain control
information. The first data byte after the chip address may be byte CO or byte FM. The 2 bytes of frequency
information are preceded by a logic 0.
16.6 I
The chip address (I
The incoming information consists of the read-mode chip address byte. The device then answers with an
ACK followed by 1 byte containing 3 bits of status information. No acknowledge is answered by the
modulator after this byte.
•
•
If 3 data bytes are received, the third one is ignored.
If 5 or more data bytes are received, the fifth and following ones are ignored, and the last ACK pulse
is sent at the end of the fourth data byte.
Example 1
Example 2
Example 3
Example 4
Notes:
2
• STA = Start condition
• FM = Frequency information, high order bits
• C1 = Control information, high order bits
• STO = Stop condition
• CA = Chip Address
• FL = Frequency information, low order bits
• CO = Control information, low order bits
C Read Mode Format
2
C bus) is shown in Table 32.
Table 31. Permitted Data Bytes (Incoming Information)
1 1 0 0 1 0 0 1 (ACK) = 0xC9 (hex) in read mode
1 1 0 0 1 0 1 1 (ACK) = 0xCB (hex) in read mode
1 1 0 0 1 1 0 1 (ACK) = 0xCD (hex) in read mode
1 1 0 0 1 1 1 1 (ACK) = 0xCF (hex) in read mode
STA
STA
STA
STA
1 1 0 0 1 0 0 0 (ACK) = 0xC8 in write mode
1 1 0 0 1 0 1 0 (ACK) = 0xCA in write mode
1 1 0 0 1 1 0 0 (ACK) = 0xCC in write mode
1 1 0 0 1 1 1 0 (ACK) = 0xCE in write mode
2
C-compatible data format. The chip address (I
Table 30. Chip Address (I
Table 32. Chip Address (I
MC44BS373CA Data Sheet
CA
CA
CA
CA
FM
FM
C1
C1
2
2
C Write Mode)
C Read Mode)
C0
C0
FL
FL
STO
STO
FM
C1
2
C bus) is shown in Table 30.
C0
FL
STO
STO