74lvc3g34 NXP Semiconductors, 74lvc3g34 Datasheet

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74lvc3g34

Manufacturer Part Number
74lvc3g34
Description
Triple Buffer Gate
Manufacturer
NXP Semiconductors
Datasheet

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1. General description
2. Features
The 74LVC3G34 provides three buffers.
The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of
this device as translator in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using I
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
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I
I
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74LVC3G34
Triple buffer
Rev. 05 — 5 October 2007
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
ESD protection:
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C.
N
N
N
N
N
24 mA output drive (V
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8B/JESD36 (2.7 V to 3.6 V)
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CC
= 3.0 V)
Product data sheet
OFF
. The I
OFF

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74lvc3g34 Summary of contents

Page 1

... Triple buffer Rev. 05 — 5 October 2007 1. General description The 74LVC3G34 provides three buffers. The inputs can be driven from either 3 devices. This feature allows the use of this device as translator in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using I circuitry disables the output, preventing the damaging backfl ...

Page 2

... Type number Package Temperature range Name 74LVC3G34DP +125 C 74LVC3G34DC +125 C 74LVC3G34GT +125 C 74LVC3G34GM +125 C 4. Marking Table 2. Marking codes Type number 74LVC3G34DP 74LVC3G34DC 74LVC3G34GT 74LVC3G34GM 5. Functional diagram 001aaa684 Fig 1. Logic symbol ...

Page 3

... Fig 6. Pin configuration SOT902-1 (XQFN8) SOT902 Rev. 05 — 5 October 2007 74LVC3G34 74LVC3G34 terminal 1 index area Transparent top view Description data input data output 4 ground ( supply voltage © ...

Page 4

... +125 C amb derates linearly with 8.0 mW/K. tot derates linearly with 2.4 mW/K. tot Conditions Active mode Power-down mode Rev. 05 — 5 October 2007 74LVC3G34 Triple buffer Min Max Unit 0.5 +6 [1] 0.5 +6 [1][2] 0 0.5 V ...

Page 5

... 3 GND Rev. 05 — 5 October 2007 74LVC3G34 Triple buffer [1] Min Typ Max ...

Page 6

... Figure [3] = GND 3 and V = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively. amb where Rev. 05 — 5 October 2007 74LVC3G34 Min Typ V 0 0.95 - 1.7 - 1.9 - 2 ...

Page 7

... CC Load Rev. 05 — 5 October 2007 74LVC3G34 DUT Table 10. Definitions for test = Load resistance Load capacitance including jig and probe L = Termination resistance should be equal to the T of the pulse generator. ...

Page 8

... Product data sheet 2.5 scale (1) ( 0.38 0.18 3.1 3.1 0.65 0.22 0.08 2.9 2.9 REFERENCES JEDEC JEITA - - - Rev. 05 — 5 October 2007 74LVC3G34 detail 4.1 0.47 0.5 0.2 0.13 0.1 3.9 0.33 EUROPEAN PROJECTION Triple buffer SOT505 ( ...

Page 9

... Product data sheet 2.5 scale (1) ( 0.27 0.23 2.1 2.4 3.2 0.5 0.17 0.08 1.9 2.2 3.0 REFERENCES JEDEC JEITA MO-187 Rev. 05 — 5 October 2007 74LVC3G34 detail 0.40 0.21 0.4 0.2 0.13 0.1 0.15 0.19 EUROPEAN PROJECTION Triple buffer SOT765 ...

Page 10

... Product data sheet scale 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA - - - MO-252 Rev. 05 — 5 October 2007 74LVC3G34 4 ( EUROPEAN PROJECTION © NXP B.V. 2007. All rights reserved. Triple buffer SOT833-1 ISSUE DATE 04-07-22 04-11- ...

Page 11

... 1.65 0.35 0.15 0.55 0.5 0.1 1.55 0.25 0.05 REFERENCES JEDEC JEITA MO-255 - - - Rev. 05 — 5 October 2007 74LVC3G34 detail 0.05 0.05 0.05 EUROPEAN PROJECTION Triple buffer SOT902 ISSUE DATE 05-11-16 05-11-25 © NXP B.V. 2007. All rights reserved ...

Page 12

... Product data sheet Product data sheet Product data sheet Product data sheet Rev. 05 — 5 October 2007 74LVC3G34 Change notice Supersedes - 74LVC3G34_4 - 74LVC3G34_3 - 74LVC3G34_2 - 74LVC3G34_1 - - © NXP B.V. 2007. All rights reserved. Triple buffer ...

Page 13

... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 05 — 5 October 2007 74LVC3G34 Triple buffer © NXP B.V. 2007. All rights reserved ...

Page 14

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Triple buffer All rights reserved. Date of release: 5 October 2007 Document identifier: 74LVC3G34_5 ...

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