AD7478A Analog Devices, AD7478A Datasheet
AD7478A
Specifications of AD7478A
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AD7478A Summary of contents
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... The input signal is sampled on the falling edge and the conversion is also initiated at this point. There are no pipeline delays associated with the parts. The AD7476A/AD7477A/ AD7478A use advanced design techniques to achieve low power dissipation at high throughput rates. The reference for the part is taken internally from V ...
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... Digital Inputs .............................................................................. 17 Modes of Operation ....................................................................... 18 Normal Mode .............................................................................. 18 Power-Down Mode .................................................................... 18 Power-Up Time .......................................................................... 18 Power vs. Throughput Rate ........................................................... 20 Serial Interface ................................................................................ 21 AD7478A SCLK Cycle Serial Interface ....................... 22 Microprocessor Interfacing ........................................................... 23 AD7476A/AD7477A/AD7478A to TMS320C541 Interface 23 AD7476A/AD7477A/AD7478A to ADSP-218x Interface .... 23 AD7476A/AD7477A/AD7478A to DSP563xx Interface ...... 24 Application Hints ........................................................................... 25 Grounding and Layout .............................................................. 25 Evaluating the AD7476A/AD7477A Performance ............... 25 Outline Dimensions ...
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... Rev Page AD7476A/AD7477A/AD7478A 1 Unit Test Conditions/Comments f = 100 kHz sine wave IN dB min 25° min typ min 25° ...
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... AD7476A/AD7477A/AD7478A Parameter LOGIC OUTPUTS Output High Voltage Output Low Voltage Floating-State Leakage Current Floating-State Output Capacitance 6 Output Coding CONVERSION RATE Conversion Time Track-and-Hold Acquisition Time 3 Throughput Rate POWER REQUIREMENTS Normal Mode (Static) Normal Mode (Operational) Full Power-Down Mode (Static) ...
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... Straight (Natural) Binary 700 ns max 250 ns max 1 MSPS max Rev Page AD7476A/AD7477A/AD7478A 1 Test Conditions/Comments f = 100 kHz sine wave 100.73 kHz 90.7 kHz fa = 100.73 kHz 90.7 kHz @ 0.1 dB Guaranteed no missed codes to 10 bits Track-and-hold in track typ when in hold ...
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... Operational from V = 2.0 V, with input high voltage ( See the Terminology section. SC70 values guaranteed by characterization Guaranteed by characterization. 6 See the Power vs. Throughput Rate section. AD7478A SPECIFICATIONS MHz SCLK Table 3. Parameter DYNAMIC PERFORMANCE Signal-to-Noise + Distortion (SINAD) 3 ...
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... V minimum. INH Rev Page AD7476A/AD7477A/AD7478A Test Conditions/Comments Typically 10 nA 200 μ 2. 5.25 V SOURCE 200 μA SINK 12 SCLK cycles with SCLK at 20 MHz ...
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... A, B grades 3 kHz min 3 Y grade MHz max AD7476A AD7477A AD7478A ns min Minimum quiet time required between bus relinquish and start of next conversion ns min Minimum CS pulse width ns min CS to SCLK setup time ns max Delay from CS until SDATA three-state disabled ...
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... Figure 3. AD7476A Serial Interface Timing Diagram t CONVERT 12.5(1/f ) SCLK 1/THROUGHPUT Figure 4. Serial Interface Timing Example Rev Page AD7476A/AD7477A/AD7478A = 5 MHz and a throughput is 315 kSPS yields a SCLK + 12.5 (1 3.174 µs 2 SCLK ACQ to be 664 ns. This 664 ns satisfies ACQ . ACQ is comprised of ACQ ...
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... AD7476A/AD7477A/AD7478A ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted Table 5. Parameter V to GND DD Analog Input Voltage to GND Digital Input Voltage to GND Digital Output Voltage to GND Input Current to Any Pin Except Supplies Operating Temperature Range Commercial (A and B Grades) Industrial (Y Grade) Storage Temperature Range ...
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... MSB first. The data stream from the AD7477A consists of four leading zeros followed by 10 bits of conversion data followed by two trailing zeros, provided MSB first. The data stream from the AD7478A consists of four leading zeros followed by 8 bits of conversion data followed by four trailing zeros that are provided MSB first. ...
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... SAMPLE f = 100kHz IN SINAD = 49.77dB THD = –75.51dB SFDR = –70.71dB 0 50 100 150 200 250 300 350 400 FREQUENCY (kHz) Figure 9. AD7478A Dynamic Performance at 1 MSPS 2.35V 5.25V 3. 100 FREQUENCY (kHz) Figure 10. AD7476A SINAD vs. Input Frequency at 1 MSPS ...
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... Figure 13. THD vs. Analog Input Frequency for Various Source Impedances –60 = 2.35V = 1MSPS –65 –70 –75 –80 –85 –90 3584 4096 10 Figure 14. THD vs. Analog Input Frequency for Various Supply Voltages Rev Page AD7476A/AD7477A/AD7478A 10kΩ 1kΩ 130Ω 13Ω ...
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... The AD7476A/AD7477A/AD7478A are tested using the CCIF standard where two input frequencies are used (see fa and fb in the Specifications section). In this case, the second-order terms ...
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... V IN SW1 B AGND ADC TRANSFER FUNCTION The output coding of the AD7476A/AD7477A/AD7478A is straight binary. The designed code transitions occur at the successive integer LSB values, that is, 1 LSB, 2 LSB, and so on. The LSB size is V AD7477A, and V characteristic for the AD7476A/AD7477A/AD7478A is shown in Figure 17. ...
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... V). The REF19x outputs a steady voltage to the AD7476A/ AD7477A/AD7478A. If the low dropout REF193 is used, the current it needs to supply to the AD7476A/AD7477A/ AD7478A is typically 1.2 mA. When the ADC is converting at a rate of 1 MSPS, the REF193 needs to supply a maximum of 1 the AD7476A/AD7477A/AD7478A. The load regulation of the ...
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... The THD increases as the source impedance increases, degrading the performance (see Figure 13). AD7476A/AD7477A/AD7478A DIGITAL INPUTS The digital inputs applied to the AD7476A/AD7477A/AD7478A are not limited by the maximum ratings that limit the analog input. Instead, the digital inputs applied can reach 7 V and are not restricted by the ...
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... SDATA goes back into three-state. For the AD7476A, 16 serial clock cycles are required to complete the conversion and access the complete conversion results. For the AD7477A and AD7478A, a minimum of 14 and 12 serial clock cycles are required to com- plete the conversion and access the complete conversion results, respectively ...
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... SCLK SDATA When power supplies are first applied to the AD7476A/AD7477A/ AD7478A, the ADC can power up in either the power-down or normal modes. Because of this best to allow a dummy cycle to elapse to ensure that the part is fully powered up before attempting a valid conversion. Likewise intended to keep ...
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... V). If the power-up time is one dummy cycle, that is μs, and the remaining conversion time is another cycle, that is, 1 μs, then the AD7476A/AD7477A/AD7478A dissipate 17.5 mW for 2 μs during each conversion cycle. If the throughput rate is 100 kSPS, the cycle time is 10 μs, then the average power dissipated during each cycle is (2/10) × ...
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... SDATA returns to three-state on the 16th SCLK falling edge, as shown in Figure 25. For the AD7478A, the conversion requires 12 SCLK cycles to complete. The track-and-hold goes back into track on the rising edge after the 11th falling edge, as shown in Figure 26 at Point B. If ...
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... THREE-STATE 4 LEADING ZEROS AD7478A SCLK CYCLE SERIAL INTERFACE For the AD7478A brought high in the 12th rising edge after four leading zeros and eight bits of the conversion have been provided, the part can achieve a 1.2 MSPS throughput rate. For the AD7478A, the track-and-hold goes back into track in the 11th rising edge ...
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... SPC register). This DSP only allows frames with a word length of 16 bits or 8 bits. Therefore, in the case of the AD7477A and AD7478A where 14 bits and 12 bits are required, the FO bit is set bits. This means that to obtain the conversion result, 16 SCLKs are needed. In both situations, the remaining SCLKs clock out trailing zeros ...
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... FSL1 = 0 and Bit FSL0 = 0 in CRB). Set the word length in Control Register A (CRA setting Bit WL2 = 0, Bit WL1 = 1, and Bit WL0 = 0 for the AD7476A. The word length for the AD7478A can be set to 12 bits (WL2 = 0, WL1 = 0, and WL0 = 1). This DSP does not offer the option for a 14-bit word ADSP-218x ...
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... A minimum etch technique is generally best for ground planes because it gives the best shielding. Join digital and analog ground planes at only one place. If the AD7476A/AD7477A/ AD7478A system where multiple devices require an AGND to DGND connection, make the connection at one point only, a star ground point that is established as close as possible to the AD7476A/AD7477A/AD7478A ...
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... AD7477AARMZ-REEL7 –40°C to +85°C AD7477AWARMZ –40°C to +85°C AD7477AWARMZ-RL –40°C to +85°C AD7478AAKSZ-500RL7 –40°C to +85°C AD7478AAKSZ-REEL –40°C to +85°C AD7478AAKSZ-REEL7 –40°C to +85°C AD7478AARM –40°C to +85°C AD7478AARMZ –40°C to +85°C 3.20 3.00 2.80 IDENTIFIER 0.40 0.95 0.10 0.85 ...
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... AUTOMOTIVE PRODUCTS The AD7476AWYRMZ, AD7476AWYRMZ-RL7, AD7477AWARMZ, AD7477AWARMZ-RL, AD7478AWARMZ, and AD7478AWARMZ-RL models are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in automotive applications ...
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... AD7476A/AD7477A/AD7478A NOTES ©2002–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02930-0-1/11(F) Rev Page ...