LTC1699 LINER [Linear Technology], LTC1699 Datasheet
LTC1699
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LTC1699 Summary of contents
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... DESCRIPTIO ® The LTC cision ( 0.35% max), digitally programmed resistor di- viders that comply with Intel 5-bit mobile (LTC1699-80), desktop VRM8.4 (LTC1699-81) and VRM9.0 (LTC1699-82) VID specifications. Each IC can switch the output of a DC/DC converter between two set voltages. A digital input pin, SEL, selects one of two divider settings stored into registers via a 2-wire SMBus interface ...
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... LTC1699 Series ABSOLUTE AXI U RATI GS (Note 1) Supply Voltage (V ) ................................................. 7V CC All Pins ........................................................– 0. Operating Temperature Range (Note 2) ................................ – Junction Temperature ........................................... 125 C U PACKAGE/ORDER I FOR ATIO TOP VIEW SEL SDA 2 7 GND 6 FB SCL 3 PGOOD 4 5 SENSE MS8 PACKAGE ...
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... PGL Note1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC1699-80E, LTC1699-81E and LTC1699-82E are guaranteed to meet performance specifications from Specifications over the – operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: All currents into device pins are positive ...
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... Hysteresis vs Supply Voltage 0. 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 SUPPLY VOLTAGE (V) 1699 G07 Resistance Between SENSE and FB Pins vs Temperature (LTC1699-81) 20. 2.7V TO 5.5V 20.06 CC 20.04 20.02 20.00 19.98 19.96 19.94 19.92 19.90 19.88 – 55 –35 – 105 125 TEMPERATURE ( C) 1699 G03 SCL, SDA, SEL and VRON Input High and Low Voltage vs Supply Voltage 1 ...
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... TEMPERATURE ( C) 1699 G11 Power Good Low Duration vs Temperature 52.0 51 5.5V CC 51.0 50 2.7V CC 50.0 49.5 49.0 –60 –40 – 100 120 TEMPERATURE ( C) 1699 G14 LTC1699-82 Divider Error vs Temperature 0. 2.7V (MINIMUM 0.14 0.12 0.10 0.08 CODE 31 0.06 0.04 CODE 15 0.02 CODE 16 0 CODE 0 –0.02 – 55 –35 –15 5 ...
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... CC SCL (Pin 4): SMBus Clock Input. Data at the SDA pin is latched into the LTC1699 at the rising edge of the clock and is shifted out of the SDA pin at the falling edge of the clock. SCL is a high impedance input pin driven by the open collector output of a microprocessor and requires a pull- ...
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... CTIO AL BLOCK DIAGRA SDA SCL V CC POWER-ON RESET SEL SENSE R1 GND * LTC1699-80 10k LTC1699-81 20k LTC1699-82 10k TEST CIRCUIT W SMBus INTERFACE LATCH 5 5 CONTROL REGISTER REGISTER 1 REGISTER 0 CONTROL LOGIC 5 5 ON/OFF STATE MACHINE MUX/DECODER SMBON TIMER CONVERTER CONTROL ...
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... LTC1699 Series DIAGRA S 8 ACK DCON VID0 VID1 VID2 VID3 VID4 ACK ACK DCON VID0 VID0 VID1 VID1 VID2 VID2 VID3 VID4 VID3 VID4 ACK ACK RD VID0 VID1 VID2 VID3 VID4 ACK ACK ACK ACK ...
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... PH SPL t t PGL PGL t SSL 90% 10% NOTE: TIMING RELATIVE TO THE STOP BIT (P) IS MEASURED FROM THE RISING EDGE OF SDA SEE TABLE 1 FOR V AND V SENSE VOLTAGES MIN MAX LTC1699 Series t HD:STA t SU:STO 1699 TD02 START STOP P 2nd OFF PROTOCOL PPL ...
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... As shown in the Block Diagram, the REF LTC1699-80, LTC1699-81 and LTC1699-82 are variable resistor dividers, which are programmed through a 2-wire SMBus interface. They are specifically designed to sim- Table 1. DC/DC Converter Output Voltage for V VID4 ...
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... First, the 7-bit slave address for both protocols is internally hardwired to 1110 001B = E2H. A single R/W bit follows the slave address. This bit is low for data transfer from the microprocessor to the LTC1699- 80, LTC1699-81 or LTC1699-82 and high for transfers in the opposite direction. ...
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... LTC1699-81 and LTC1699-82 sample each bit at the rising edges of the SCL clock. When the microprocessor issues a start bit, all the slave devices on the bus, including the LTC1699-80, LTC1699-81 or LTC1699-82 clock in the address byte, which consists of a 7-bit slave address and the R/W bit (set to 0). If the 12 W ...
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... SMBus specifications, the microprocessor does not acknowledge the last data byte. The LTC1699-80, LTC1699-81 or LTC1699-82 enters an idle state to wait for the next start bit after clocking out the Data High byte. The five most significant bits (VID0-VID4) of the Data Low and High bytes are the resistor divider settings previously loaded using the Setup protocol ...
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... LTC1699 Series U U APPLICATIO S I FOR ATIO pin is used to shut down the converters without the need for lengthy SMBus Off protocols and can also be used to turn three DC/DC converters simultaneously. The VRON pin has an internal 2.5uA current source pull-up. The CPU_ON, IO_ON and CLK_ON pins are N-channel, open drain outputs ...
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... U U APPLICATIO S I FOR ATIO Operating Sequence A typical control sequence for the LTC1699-80, LTC1699-81 and LTC1699- follows: • On power up, the DCON bit is preset to a high state by the power-on reset (POR) circuit. The CPU_ON, IO_ON and CLK_ON pins are pulled low to shut down the DC/ DC converters ...
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... LTC1699 Series U TYPICAL APPLICATIO S 16 ...
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... U TYPICAL APPLICATIO S LTC1699 Series 17 ...
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... LTC1699 Series U TYPICAL APPLICATIO S SMBus Programmed CPU Core Voltage Regulator for 2-Step Applications (V C 0.1 F INTV CC 10k 100k C POWER 470k 220pF GOOD Q5 Q4 0.1 F 47pF V SENSE CC 180pF LTC1699-81 VRON FB TO SCL CPU_ON P SDA PGOOD SEL CLK_ON IO_ON GND SGND *OPTIONAL TO DEFEAT OVERCURRENT LATCHOFF ...
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... TYP SEATING PLANE 0.009 – 0.015 0.021 0.006 (0.22 – 0.38) (0.53 0.015) LTC1699 Series 0.189 – 0.196* (4.801 – 4.978) 0.009 (0.229 REF 0.150 – 0.157** (3.810 – 3.988 0.004 – ...
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... LTC1699 Series U TYPICAL APPLICATIO 0 RELATED PARTS PART NUMBER DESCRIPTION LTC1628/ High Efficiency, 2-phase, Synchronous Step Down Switching Regulators LTC1628-PG 2 LTC1694/ SMBus/I C Accelerators in SOT-23 LTC1694-1 LTC1702 Dual 1 MHz Synchronous 5V to 2.xV/1.xV Switching Regulator Controller Low Input Voltages, High Efficiency LTC1735/ High Efficiency Synchronous Step Down Switching Regulators ...