SY89429 MICREL [Micrel Semiconductor], SY89429 Datasheet

no-image

SY89429

Manufacturer Part Number
SY89429
Description
PROGRAMMABLE FREQUENCY SYNTHESIZER 25MHz to 400MHz
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SY89429AJC
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
SY89429AJC TR
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
SY89429AJZ
Manufacturer:
Micrel
Quantity:
101
Part Number:
SY89429AJZ
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
SY89429AJZ
Manufacturer:
MICREL
Quantity:
20 000
Part Number:
SY89429AJZ TR
Manufacturer:
MICREL
Quantity:
2 435
Part Number:
SY89429AJZ TR
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
SY89429AZC
Manufacturer:
SILERGY/矽力杰
Quantity:
20 000
Part Number:
SY89429AZH
Manufacturer:
MICREL
Quantity:
233
Part Number:
SY89429JC
Manufacturer:
SYNERGY
Quantity:
5 510
Part Number:
SY89429JC
Manufacturer:
SYNERGY
Quantity:
20 000
Part Number:
SY89429VJZ
Manufacturer:
Micrel Inc
Quantity:
135
Part Number:
SY89429VJZ
Manufacturer:
MICREL
Quantity:
31
Part Number:
SY89429VZC
Manufacturer:
MICREL/麦瑞
Quantity:
20 000
Part Number:
SY89429ZC
Manufacturer:
SYNERGY
Quantity:
20 000
FEATURES
APPLICATIONS
Improved jitter performance over SY89429
25MHz to 400MHz differential PECL outputs
Minimal frequency over-shoot
Synthesized architecture
Serial 3 wire interface
Parallel interface for power-on
Internal quartz reference oscillator driven by quartz
crystal or PECL source
PECL output can operate with either +3.3V or +5V
VCC_OUT power supply
External loop filter optimizes performance/cost
Applications note (AN-06) for ease of design-ins
Available in PLCC and SOIC 28-pin packages
PIN CONFIGURATION
Workstations
Advanced communications
High end consumer
High-performance computing
RISC CPU clock
Graphics pixel clock
Test equipment
Other high-performance processor-based
applications
25ps peak-to-peak output jitter
LOOP
LOOP_
V
CC_QUIET
S
S
S
_FILTER
_CLOCK
XTAL1
_DATA
_LOAD
REF
26
27
28
2
3
4
1
25 24 23 22 21 20 19
5
6
TOP VIEW
7
PLCC
8
9
10 11
18
17
16
15
14
13
12
PROGRAMMABLE
FREQUENCY SYNTHESIZER
(25MHz to 400MHz)
N[1]
N[0]
M[8]
M[7]
M[6]
M[5]
M[4]
1
source targeting applications that require both serial and
parallel interfaces. Its internal VCO will operate over a
range of frequencies from 400MHz to 800MHz. The
differential PECL output can be configured to be the VCO
frequency divided by 2, 4, 8 or 16. With the output configured
to divide the VCO frequency by 2, and with a 16MHz
external quartz crystal used to provide the reference
frequency, the output frequency can be specified in 1MHz
steps.
DESCRIPTION
The SY89429A is a general purpose, synthesized clock
GND (TTL)
V
CC
TEST
(TTL)
M[0]
M[4]
N[0]
N[1]
M[1]
M[2]
M[3]
M[5]
M[6]
M[7]
M[8]
12
13
14
10
11
4
5
6
7
8
1
2
9
3
TOP VIEW
Z28-1
SOIC
18
16
28
27
26
25
24
23
20
19
17
15
22
21
ClockWorks™
Rev.: H
Issue Date: October, 1998
P
LOOP
LOOP
S
S
FOUT
FOUT
V
XTAL
XTAL
V
S
V
GND
_LOAD
_DATA
_CLOCK
CC1
CC_QUIET
_LOAD
CC_OUT
SY89429A
2
1
_REF
_FILTER
Amendment: /0

Related parts for SY89429

SY89429 Summary of contents

Page 1

... PROGRAMMABLE FREQUENCY SYNTHESIZER (25MHz to 400MHz) DESCRIPTION The SY89429A is a general purpose, synthesized clock source targeting applications that require both serial and parallel interfaces. Its internal VCO will operate over a range of frequencies from 400MHz to 800MHz. The differential PECL output can be configured to be the VCO frequency divided ...

Page 2

... V V CC_QUIET CC1 400-800 MHz V CC_OUT T110 ÷ N (2,4,8,16) 7 FOUT ÷ 4 — LATCH 6 S_ ÷ M — CLOCK LATCH LOW — 5 FOUT — ÷ M — 2 FREF — 1 HIGH — 2-BIT SR 3-BIT SR 0 19,22 17,18 2 N[1:0] ClockWorks™ SY89429A +5. FOUT 23 FOUT 20 TEST ...

Page 3

... These pins are the negative supply for the chip and are normally all connected to ground. for proper operation. OTHER LOOP_FILTER . LOAD This is an analog I/O pin that provides the loop filter for the PLL. LOOP_REF This is an analog I/O pin that provides a reference voltage for the PLL ClockWorks™ SY89429A . VCC1 ...

Page 4

... LOW until sometime after LOAD held LOW, on the LOW- LOAD , the parallel inputs are captured. LOAD must meet set-up and DATA held HIGH, the configuration latches will LOAD input. See the programming section for more SY89429A • • • 1 ...

Page 5

... M register with the final eight bits of the data stream on the S_ the most significant bit is loaded first (T2, N1 and M8). When T[2:0] is set to 100 the SY89429A is placed in PLL bypass mode. In this mode the S_ into the M and N dividers. The N divider drives the FOUT differential pair and the M counter drives the TEST output pin ...

Page 6

... ClockWorks™ SY89429A –2V –2V Condition — — 2. 0. –12mA –2.0mA 8mA OUT — Condition Fundamental Cyrstal ...

Page 7

... Micrel TIMING DIAGRAM S_ DATA S_ CLOCK S_ LOAD M[8:0] N[1:0] P_ LOAD PRODUCT ORDERING CODE Ordering Package Code Type SY89429AJC J28-1 SY89429AJCTR J28-1 SY89429AZC Z28-1 SY89429AZCTR Z28-1 t HOLD t SET-UP t SET-UP t HOLD t SET-UP Operating Range Commercial Commercial Commercial Commercial 7 ClockWorks™ SY89429A ...

Page 8

... Micrel 28 LEAD SOIC .300" WIDE (Z28-1) 8 ClockWorks™ SY89429A Rev. 02 ...

Page 9

... This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc (408) 914-7878 http://www.micrel.com FAX WEB © 2000 Micrel Incorporated 9 ClockWorks™ SY89429A Rev. 03 ...

Related keywords