74LVTH574 FAIRCHILD [Fairchild Semiconductor], 74LVTH574 Datasheet

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74LVTH574

Manufacturer Part Number
74LVTH574
Description
Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet

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© 2005 Fairchild Semiconductor Corporation
74LVT574WM
74LVT574SJ
74LVT574MSA
74LVT574MTC
74LVT574MTCX_NL
(Note 1)
74LVTH574WM
74LVTH574SJ
74LVTH574MSA
74LVTH574MTC
74LVTH574MTCX_NL
(Note 1)
74LVT574 • 74LVTH574
Low Voltage Octal D-Type Flip-Flop
with 3-STATE Outputs
General Description
The LVT574 and LVTH574 are high-speed, low-power
octal D-type flip-flop featuring separate D-type inputs for
each flip-flop and 3-STATE outputs for bus-oriented appli-
cations. A buffered Clock (CP) and Output Enable (OE) are
common to all flip-flops.
The LVTH574 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
These octal flip-flops are designed for low-voltage (3.3V)
V
interface to a 5V environment. The LVT574 and LVTH574
are fabricated with an advanced BiCMOS technology to
achieve high speed operation similar to 5V ABT while
maintaining a low power dissipation.
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
CC
Order Number
applications, but with the capability to provide a TTL
Package
Number
MSA20
MTC20
MTC20
MSA20
MTC20
MTC20
M20B
M20D
M20B
M20D
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
DS012451
Features
Input and output interface capability to systems at
5V V
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH574),
also available without bushold feature (74LVT574)
Live insertion/extraction permitted
Power Up/Down high impedance provides glitch-free
bus loading
Outputs source/sink
Functionally compatible with the 74 series 574
Latch-up performance exceeds 500 mA
ESD performance:
Human-body model
Machine model
Charged-device model
Package Description
CC
!
200V
!

32 mA/
2000V
!
1000V
March 1999
Revised March 2005

64 mA
www.fairchildsemi.com

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74LVTH574 Summary of contents

Page 1

... Fairchild Semiconductor Corporation Features Input and output interface capability to systems Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH574), also available without bushold feature (74LVT574) Live insertion/extraction permitted Power Up/Down high impedance provides glitch-free bus loading  ...

Page 2

Logic Symbols IEEE/IEC Connection Diagram Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com Pin Descriptions Pin Names Description D –D Data Inputs ...

Page 3

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Current Supply Current ...

Page 4

... Note 5: Applies to bushold versions only (74LVTH574). Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW. Note 8: This is the increase in supply current for each input that is at the specified voltage level rather than V ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide Package Number MSA20 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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