IDT7132 Integrated Device Technology, IDT7132 Datasheet
IDT7132
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IDT7132 Summary of contents
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... STATIC RAM DESCRIPTION: The IDT7132/IDT7142 are high-speed Dual-Port Static RAMs. The IDT7132 is designed to be used as a stand- alone 8-bit Dual-Port RAM “MASTER” Dual-Port RAM together with the IDT7142 “SLAVE” Dual-Port in 16-bit-or- more word width systems. Using the IDT MASTER/SLAVE ...
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... IDT7132SA/LA AND IDT7142SA/LA HIGH-SPEED DUAL-PORT STATIC RAM PIN CONFIGURATIONS (1, BUSY 10L IDT7132 7142 P48 & C48 DIP I TOP I ...
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... IDT7132SA/LA AND IDT7142SA/LA HIGH-SPEED DUAL-PORT STATIC RAM DC ELECTRICAL CHARACTERISTICS OVER THE OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE Symbol Parameter Test Conditions CE I Dynamic Operating and CC L Current (Both Ports Outputs open, Active MAX CE I Standby Current and SB1 L (Both Ports - TTL ...
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... IDT7132SA/LA AND IDT7142SA/LA HIGH-SPEED DUAL-PORT STATIC RAM DATA RETENTION CHARACTERISTICS Symbol Parameter V V for Data Retention Data Retention Current CCDR (3) t Chip Deselect to Data CDR Retention Time (3) t Operation Recovery R Time NOTES 2V +25 C, and is not production tested. ...
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... IDT7132SA/LA AND IDT7142SA/LA HIGH-SPEED DUAL-PORT STATIC RAM AC ELECTRICAL CHARACTERISTICS OVER THE OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE Symbol Parameter Read Cycle t Read Cycle Time RC t Address Access Time AA t Chip Enable Access Time ACE t Output Enable Access Time AOE t Output Hold From Address Change ...
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... IDT7132SA/LA AND IDT7142SA/LA HIGH-SPEED DUAL-PORT STATIC RAM TIMING WAVEFORM OF READ CYCLE NO. 2, EITHER SIDE CE OE DATA OUT CURRENT I SS NOTES: 1. Timing depends on which signal is asserted last, 2. Timing depends on which signal is deaserted first and the address is valid prior to or coincidental with IH 4 ...
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... IDT7132SA/LA AND IDT7142SA/LA HIGH-SPEED DUAL-PORT STATIC RAM TIMING WAVEFORM OF WRITE CYCLE NO. 1, (R/ ADDRESS DATA (4) OUT DATA IN TIMING WAVEFORM OF WRITE CYCLE NO ADDRESS DATA IN NOTES must be High during all address transitions write occurs during the overlap (t ...
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... IDT7132SA/LA AND IDT7142SA/LA HIGH-SPEED DUAL-PORT STATIC RAM AC ELECTRICAL CHARACTERISTICS OVER THE OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE Symbol Parameter Busy Timing (For Master lDT7130 Only) BUSY t Access Time from Address BAA BUSY t Disable Time from Address BDA BUSY t Access Time from Chip Enable ...
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... R/ R NOTES: BUSY 1. t must be met for both Input (IDT7142, slave) or Output (IDT7132, master). WH BUSY asserted on port 'B' blocking R/ 3. All timing is the same for the left and right ports. Port 'A' may be either the left or right port. Port 'B' is opposite from port 'A'. ...
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... FUNCTIONAL DESCRIPTION The IDT7132/IDT7142 provides two ports with separate control, address and I/O pins that permit independent access for reads or writes to any location in memory. The IDT7132/ IDT7142 has an automatic power down feature controlled The Function ...
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... R/ IDT7142 IDT7142 SLAVE (1) SLAVE BUSY BUSY Figure 4. Busy and chip enable routing for both width and depth expansion with IDT7132 (Master) and IDT7142 (Slave) RAMs. ORDERING INFORMATION IDT XXXX A 999 Device Type Power Speed If two or more master parts were used when expanding in ...