MC74HC165A Motorola, MC74HC165A Datasheet

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MC74HC165A

Manufacturer Part Number
MC74HC165A
Description
8-Bit Serial or Parallel-Input/Serial-Output Shift Register
Manufacturer
Motorola
Datasheet

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Product Preview
8-Bit Serial or Parallel-Input/
Serial-Output Shift Register
High–Performance Silicon–Gate CMOS
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
last stage. Data may be loaded into the register either in parallel or in serial
form. When the Serial Shift/Parallel Load input is low, the data is loaded
asynchronously in parallel. When the Serial Shift/Parallel Load input is high,
the data is loaded serially on the rising edge of either Clock or Clock Inhibit
(see the Function Table).
clock sources or by designating one of the clock inputs to act as a clock
inhibit.
This document contains information on a product under development. Motorola reserves the right to change or
discontinue this product without notice.
10/95
PARALLEL LOAD
Motorola, Inc. 1995
The MC54/74HC165A is identical in pinout to the LS165. The device
This device is an 8–bit shift register with complementary outputs from the
The 2–input NOR clock may be used either by combining two independent
CLOCK INHIBIT
PARALLEL
SERIAL SHIFT/
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 286 FETs or 71.5 Equivalent Gates
INPUTS
SERIAL
INPUT
DATA
DATA
CLOCK
S A
G
A
B
C
D
E
H
F
11
12
13
14
10
15
3
4
5
6
1
2
Parallel Load
X = don’t care
Serial Shift/
LOGIC DIAGRAM
H
H
H
H
H
H
H
L
Clock
H
X
L
L
X
L
Q An – Q Gn = Data shifted from the preceding stage
Inputs
9
7
Inhibit
Clock
X
H
X
L
L
L
Q H
Q H
PIN 16 = V CC
PIN 8 = GND
OUTPUTS
SERIAL
DATA
S A
X
H
H
X
X
X
L
L
FUNCTION TABLE
a
A – H
1
X
X
X
X
X
X
X
h
Internal Stages
Q A
H
H
a
L
L
No Change
No Change
Q An
Q An
Q An
Q An
Q B
REV 0
b
PARALLEL LOAD
MC54/74HC165A
SERIAL SHIFT/
16
16
16
16
1
Output
1
MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXAD
MC74HCXXXADT
Q Gn
Q Gn
Q Gn
Q Gn
Q H
CLOCK
ORDERING INFORMATION
h
1
1
GND
Q H
PIN ASSIGNMENT
G
E
H
F
Asynchronous Parallel Load
Serial Shift via Clock
Serial Shift via Clock Inhibit
Inhibited Clock
No Clock
1
2
3
4
5
6
7
8
CERAMIC PACKAGE
PLASTIC PACKAGE
TSSOP PACKAGE
Operation
Operation
SOIC PACKAGE
CASE 948F–01
CASE 751B–05
CASE 620–10
CASE 648–08
16
15
14
13
12
10
11
DT SUFFIX
9
N SUFFIX
D SUFFIX
J SUFFIX
Ceramic
Plastic
SOIC
TSSOP
V CC
CLOCK INHIBIT
D
C
B
A
S A
Q H

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MC74HC165A Summary of contents

Page 1

... don’t care Q An – Data shifted from the preceding stage This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice. 10/95 Motorola, Inc. 1995 SERIAL DATA 7 OUTPUTS ...

Page 2

... For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). Î Î Î Î Î Î Î Î ...

Page 3

... NOTES: 1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). 2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). ...

Page 4

... NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). MOTOROLA Î Î Î ...

Page 5

... The shift register is completely static, allowing Clock rates down continuous or intermittent mode. OUTPUTS (Pins 9, 7) Complementary Shift Register outputs. These pins are the noninverted and inverted outputs of the eighth stage of the shift register. 5 MC54/74HC165A MOTOROLA ...

Page 6

... CLOCK 50% OR CLOCK INHIBIT Figure 5. Serial–Shift Mode CLOCK 2 INHIBITED CLOCK INHIBIT 50 rec CLOCK 50% Figure 7. Serial–Shift, Clock–Inhibit Mode MOTOROLA SWITCHING WAVEFORMS V CC GND SERIAL SHIFT/ 50% PARALLEL LOAD t PLH Figure 2. Parallel–Load Mode t f INPUTS A–H ...

Page 7

... EXPANDED LOGIC DIAGRAM TIMING DIAGRAM SERIAL–SHIFT MODE 7 MC54/74HC165A MOTOROLA ...

Page 8

... 0.25 (0.010) –A – –T – SEATING PLANE 0.25 (0.010 MOTOROLA OUTLINE DIMENSIONS J SUFFIX CERAMIC PACKAGE CASE 620–10 ISSUE V –B – 0.25 (0.010 SUFFIX PLASTIC PACKAGE CASE 648–08 ...

Page 9

... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “ ...

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