MPC940 Motorola, MPC940 Datasheet

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MPC940

Manufacturer Part Number
MPC940
Description
Manufacturer
Motorola
Datasheet

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Advance Information
Low Voltage 1:18 Clock
Distribution Chip
features the capability to select either a differential LVPECL or an LVTTL/
LVCMOS compatible input. The 18 outputs are LVCMOS or LVTTL
compatible and feature the drive strength to drive 50
terminated transmission lines. With output–to–output skews of 150ps, the
MPC940 is ideal as a clock distribution chip for the most demanding of
synchronous systems. For a similar product with a larger number of
outputs, please consult the MPC941 data sheet.
states, the output buffers of the MPC940 are ideal for driving series
terminated transmission lines. More specifically, each of the 18 MPC940
outputs can drive two series terminated 50 transmission lines. With this
capability, the MPC940 has an effective fanout of 1:36 in applications
where each line drives a single load. With this level of fanout, the
MPC940 provides enough copies of low skew clocks for most high
performance synchronous systems.
MC100EP111 to build very wide clock fanout trees or to couple to a high frequency clock source. The LVCMOS/LVTTL input
provides a more standard interface for applications requiring only a single clock distribution chip at relatively low frequencies. In
addition, the two clock sources can be used to provide for a test clock interface as well as the primary system clock. A logic HIGH
on the LVCMOS_CLK_Sel pin will select the TTL level clock input.
cost of the device. The 32–lead TQFP has a 7x7mm body size with a conservative 0.8mm pin spacing.
This document contains information on a new product. Specifications and information herein are subject to
change without notice.
6/97
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 1997
LVPECL or LVCMOS/LVTTL Clock Input
150ps Maximum Targeted Output–to–Output Skew
Drives Up to 36 Independent Clock Lines
Maximum Output Frequency of 250MHz
32–Lead TQFP Packaging
3.3V V CC Supply Voltage
The MPC940 is a 1:18 low voltage clock distribution chip. The device
With a low output impedance ( 20 ), in both the HIGH and LOW logic
The differential LVPECL inputs of the MPC940 allow the device to interface directly with a LVPECL fanout buffer like the
The MPC940 is fully 3.3V compatible. The 32–lead TQFP package was chosen to optimize performance, board space and
1
series or parallel
REV 0.2
DISTRIBUTION CHIP
32–LEAD TQFP PACKAGE
LOW VOLTAGE
MPC940
1:18 CLOCK
CASE 873A–02
FA SUFFIX

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MPC940 Summary of contents

Page 1

... MPC940 provides enough copies of low skew clocks for most high performance synchronous systems. The differential LVPECL inputs of the MPC940 allow the device to interface directly with a LVPECL fanout buffer like the MC100EP111 to build very wide clock fanout trees or to couple to a high frequency clock source. The LVCMOS/LVTTL input provides a more standard interface for applications requiring only a single clock distribution chip at relatively low frequencies ...

Page 2

... MPC940 PECL_CLK PECL_CLK LVCMOS_CLK LVCMOS_CLK_Sel Pinout: 32–Lead TQFP (Top View GNDO MPC940 VCCO MOTOROLA LOGIC DIAGRAM VCCO 15 Q12 FUNCTION TABLE 14 Q13 LVCMOS_CLK_Sel 13 Q14 12 GNDO 11 Q15 10 Q16 9 Q17 ...

Page 3

... Input Current C IN Input Capacitance C pd Power Dissipation Capacitance I CC Maximum Quiescent Supply Current 1. The MPC940 outputs can drive series or parallel terminated 50 ( /2) transmission lines on the incident edge. AC CHARACTERISTICS ( 3.3V 5%) Symbol Characteristic F max Maximum Input Frequency t pd ...

Page 4

... MPC940 –T– DETAIL –Z– –AB– SEATING –AC– PLANE 0.10 (0.004 DETAIL AD MOTOROLA OUTLINE DIMENSIONS FA SUFFIX TQFP PACKAGE CASE 873A–02 ISSUE A 4X 0.20 (0.008) AB T– –U– ...

Page 5

... Motorola, Inc. Motorola, Inc Equal Mfax is a trademark of Motorola, Inc. JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4–32–1, Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan. 81–3–5487–8488 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 5 MPC940 MPC940/D MOTOROLA ...

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