NB6L16 ON Semiconductor, NB6L16 Datasheet

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NB6L16

Manufacturer Part Number
NB6L16
Description
6GHz/6Gbps 2.5V/3.3V Multi-level Input to Differential Lvecl Clock or Data Translator/receiver/driver Buffer The NB6L16 is a High Precision, Low Power Ecl Differential Clockor Data Receiver/driver/translator Buffer. The Device is Functionallyequivale
Manufacturer
ON Semiconductor
Datasheet

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NB6L16
2.5V / 3.3V Multilevel Input to
Differential LVPECL/LVNECL
Clock or Data
Receiver/Driver/Translator
Buffer
or data receiver/driver/translator buffer. The device is functionally
equivalent to the EL16, EP16, LVEL16 and NBSG16 devices. With
output transition times of 70 ps, it is ideally suited for high frequency,
low power systems. The device is targeted for Backplane buffering,
GbE clock/data distribution, Fibre Channel distribution and SONET
clock/data distribution applications.
LVTTL, LVCMOS, CML, or LVDS. Outputs are 800 mV ECL
signals.
this device only. For single−ended input conditions, the unused
differential input is connected to V
V
and V
to 0.5 mA. When not used, V
 Semiconductor Components Industries, LLC, 2004
April, 2004 − Rev. 2
BB
The NB6L16 is a high precision, low power ECL differential clock
Input accept LVNECL (Negative ECL), LVPECL (Positive ECL),
The V
V
with V
Compatible
Maximum Input Clock Frequency w 6 GHz Typical
Maximum Input Data Rate Frequency w 6 Gb/s Typical
Low 12 mA Typical Power Supply Current
70 ps Typical Rise/Fall Times
130 ps Input Propagation Delay
On−Chip Reference for ECL Single−Ended Input − V
PECL Mode Operating Range: V
NECL Mode Operating Range: V
Open Input Default State
LVDS, LVPECL, LVNECL, LVCMOS, LVTTL and CML Input
EE
may also rebias AC coupled inputs. When used, decouple V
CC
= 0 V
BB
via a 0.01 mF capacitor and limit current sourcing or sinking
EE
pin, an internally generated voltage supply, is available to
= −2.375 V to −3.465 V
BB
should be left open.
BB
CC
CC
as a switching reference voltage.
= 2.375 V to 3.465 V with
= 0 V
BB
Output
1
BB
†For information on tape and reel specifications,
**Future Product − Contact factory for availability.
NB6L16D
NB6L16DR2
NB6L16DT**
NB6L16DTR2**
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
CASE 948R
DT SUFFIX
CASE 751
D SUFFIX
TSSOP−8
8
SOIC−8
Device
8
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
1
1
A
L
Y
W
http://onsemi.com
TSSOP−8
TSSOP−8
= Assembly Location
= Wafer Lot
= Year
= Work Week
Package
SOIC−8
SOIC−8
MARKING DIAGRAMS*
Publication Order Number:
8
1
8
1
ALYW
Shipping
100 Units/Rail
ALYW
6L16
98 Units/Rail
6L16
Tape & Reel
Tape & Reel
2600 /
2500 /
NB6L16/D

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NB6L16 Summary of contents

Page 1

... Differential LVPECL/LVNECL Clock or Data Receiver/Driver/Translator Buffer The NB6L16 is a high precision, low power ECL differential clock or data receiver/driver/translator buffer. The device is functionally equivalent to the EL16, EP16, LVEL16 and NBSG16 devices. With output transition times ideally suited for high frequency, low power systems ...

Page 2

... Internal Input Default State Resistor Internal Input Default State Resistor ESD Protection Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. NB6L16 ...

Page 3

... Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. NB6L16 Condition 1 Condition 2 ...

Page 4

... Input and output parameters vary 1:1 with V 5. All input and output pins left open. 6. All loading with − 2 not use reference voltage for single−ended PECL signals when operating device NB6L16 (Note −40°C 25°C ...

Page 5

... V minimum varies 1:1 with CMR EE CMR 10. Input and output parameters vary 1:1 with V 11. All input and output pins left open. 12. All loading with − 2 NB6L16 (Note 10 −40°C 25°C Min Typ Max Min 10 ...

Page 6

... CMR EE CMR 15. Input and output parameters vary 1:1 with V 16. All loading with − 2 17. All input and output pins left open. NB6L16 −3.465 V to −2.375 V (Note 15 −40°C 25°C Min Typ ...

Page 7

... INPUT CLOCK FREQUENCY (GHz) Figure 2. Output Voltage Amplitude (V versus Input Clock Frequency (f Temperature at V − NB6L16 = −3.465 V to −2.375 2.375 V to 3.465 −40°C 25°C Min Typ Max Min Typ 500 700 500 ...

Page 8

... POWER SUPPLY VOLTAGE (V) Figure 6. Propagation Delay versus Power Supply Voltage and Temperature −40 Figure 8. I NB6L16 Figure 5. Typical Output Waveform at 6.125 Gb/s with PRBS 2 Pk−Pk Jitter is 17 ps. Device Pk−Pk Jitter − 3 700 mV 25° 120 110 100 85° ...

Page 9

... IHmin V thmin V ILmin GND Figure 12. V Diagram th Q Driver Device Q Figure 14. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) NB6L16 V ( (D) − V INPP (D) − V INPP (Q) − V OUTPP ...

Page 10

... NB6L16 Resource Reference of Application Notes AN1405 − ECL Clock Distribution Techniques AN1568 − Interfacing Between LVDS and ECL AN1650 − Using Wire−OR Ties in ECLinPS De- signs AN1672 − The ECL Translator Guide AND8001 − Odd Number Counters Design AND8002 − Marking and Date Codes AND8003 − ...

Page 11

... −Y− SEATING PLANE −Z− 0.10 (0.004 0.25 (0.010 0.6 0.024 NB6L16 PACKAGE DIMENSIONS SOIC−8 D SUFFIX PLASTIC SOIC PACKAGE CASE 751−07 ISSUE 1.52 0.060 7.0 4.0 0.275 0.155 1.270 0.050 mm ...

Page 12

... B 2.90 3.10 0.114 0.122 C 0.80 1.10 0.031 0.043 D 0.05 0.15 0.002 0.006 F 0.40 0.70 0.016 0.028 G 0.65 BSC 0.026 BSC K 0.25 0.40 0.010 0.016 L 4.90 BSC 0.193 BSC Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. NB6L16/D ...

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