pi6c180 Pericom Semiconductor Corporation, pi6c180 Datasheet
pi6c180
Related parts for pi6c180
pi6c180 Summary of contents
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... OE SDATA I/O SCLOCK Description The PI6C180, a high-speed low-noise 1-18 non-inverting buffer designed for SDRAM clock buffer applications operates up to 100 MHz. At power up all SDRAM output are enabled and active. The I Serial control may be used to individually activate/deactivate any of the 18 output drivers. The output enable (OE) pin may be pulled low to put all outputs in a Hi-Z state ...
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... A0 R Note: 1. Inactive means outputs are held LOW and are disabled from switching. 2 Precision 1-18 Clock Buffer Description 2 C circuitry Pin Description 18 SDRAM7 (Active/Inactive) 17 SDRAM6 (Active/Inactive) 14 SDRAM5 (Active/Inactive) 13 SDRAM4 (Active/Inactive) 9 SDRAM3 (Active/Inactive) 8 SDRAM2 (Active/Inactive) 5 SDRAM1 (Active/Inactive) 4 SDRAM0 (Active/Inactive) PI6C180 PS8141F 12/13/04 ...
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... The I C interface permits individual enable/disable of each clock output and test mode enable. The PI6C180 is a slave receiver device. It can not be read back. Sub addressing is not supported. All preceding bytes must be sent in order to change one of the control bytes. Every bite put on the SDATA line must be 8-bits long (MSB first), fol- lowed by an acknowledge bit generated by the receiving device ...
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... Parameter (1) (1) 4 Precision 1-18 Clock Buffer Min. Typ. Max. 2 -0.3 0 2.4 0 Min. Typ. -54 54 1.5 1.5 66 MHz 100 MHz Min. Max. Min. Max. 1.5 4.0 1.5 1.5 4.0 1.5 1.0 5.0 1.0 1.0 5.0 1.0 1.0 8.0 1.0 1.0 8.0 1 250 250 PI6C180 Units +0 °C Max. Units - V/ns 4 Units 4.0 V/ns 4.0 5.0 5.0 ns 8.0 8 PS8141F 12/13/04 ...
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... Route clock traces over a continuous ground plane or over a continuous power plane. Avoid routing clock traces from plane to plane (refer to rule #2). 4. Position clock signals away from signals that go to any cables or any external connectors. 5 Precision 1-18 Clock Buffer Test Point tSDKL 1.5V t phl 1.5V PI6C180 PS8141F 12/13/04 ...
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... VDD VSS VDD VSS VDD VSS 23 26 VSS 24 25 SDRAM DIMM CI Spec. 6 Precision 1-18 Clock Buffer Ferrite Bead VCC C12 22uF Via to GND Plane Via to VDD Plane Void in Power Plane . DD PS8141F PI6C180 12/13/04 ...
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... Gauge Plane .620 .630 15.75 .008 16.00 0.20 Nom. .008 0.20 .025 BSC .0135 0.34 0.635 Package Code V 48-pin SSOP V Pb-free and Green 48-pin SSOP 7 Precision 1-18 Clock Buffer .010 0.25 .02 0.51 .04 1.01 .015 0.381 x 45˚ 0.635 .025 .110 2.79 .008 0.20 0-8˚ .016 0.40 Package Type PI6C180 Max PS8141F 12/13/04 ...