MC68HC705J1A

Manufacturer Part NumberMC68HC705J1A
ManufacturerMotorola
MC68HC705J1A datasheet
 

Specifications of MC68HC705J1A

CaseDIP-20L  
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Page 100/162

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Computer Operating Properly (COP) Module
7.6 Low-Power Modes
The STOP and WAIT instructions have these effects on the COP
watchdog.
7.6.1 Stop Mode
The STOP instruction clears the COP watchdog counter and disables
the clock to the COP watchdog.
NOTE:
To prevent the STOP instruction from disabling the COP watchdog,
program the stop-to-wait conversion bit (SWAIT) in the mask option
register to logic 1.
Upon exit from stop mode by external reset:
Upon exit from stop mode by external interrupt:
NOTE:
Immediately after exiting stop mode by external interrupt, service the
COP to ensure a full COP timeout period.
7.6.2 Wait Mode
The WAIT instruction has no effect on the COP watchdog.
NOTE:
To prevent a COP timeout during wait mode, exit wait mode periodically
to service the COP.
Technical Data
100
The counter begins counting from $0000.
The counter is cleared again after the oscillator stabilization delay
and begins counting from $0000 again.
The counter begins counting from $0000.
The counter is not cleared again after the oscillator stabilization
delay and continues counting throughout the oscillator
stabilization delay.
Computer Operating Properly (COP) Module
MC68HC705J1A — Rev. 4.0
MOTOROLA