VT82C686B

Manufacturer Part NumberVT82C686B
ManufacturerETC-unknow
VT82C686B datasheet
 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
Page 111
112
Page 112
113
Page 113
114
Page 114
115
Page 115
116
Page 116
117
Page 117
118
Page 118
119
Page 119
120
Page 120
121
122
123
124
125
126
127
128
Page 118/128

Download datasheet (2Mb)Embed
PrevNext
7HFKQRORJLHV ,QF
Read / Write through function 6, R/O through function 5.
I/O Offset 40 – Modem SGD Read Channel Status ..... RWC
7
SGD Active (0 = completed or terminated)........RO
6
SGD Paused ..........................................................RO
........................................ always reads 0
5-4
Reserved
3
SGD Trigger Queued (will restart after EOL) ..RO
2
SGD Stopped (write 1 to resume) ...................RWC
1
SGD EOL
......................................................RWC
0
SGD Flag
......................................................RWC
I/O Offset 41 – Modem SGD Read Channel Control ..... RW
7
SGD Start ............................ WO (always reads 0)
0
No effect
1
Start SGD read channel operation
6
SGD Terminate ...................... WO (always reads 0)
0
No effect
1
Terminate SGD read channel operation
5-4
Test (Do Not Program) .......................always write 0
3
SGD Pause .........................................................RW
0
Release SGD read channel pause and resume
the transfer from the paused line
1
Pause SGD read channel operation (SGD read
channel pointer stays at the current address)
2-0
Reserved
........................................ always reads 0
I/O Offset 42 – Modem SGD Read Channel Type .......... RW
7
Auto-Start SGD at EOL (1=Enable) ....... default = 0
6-4
Reserved
........................................ always reads 0
3-2
Interrupt Select
00 Interrupt at PCI Read of Last Line .........default
01 Interrupt at Last Sample Sent
10 Interrupt at Less Than One Line to Send
11 -reserved-
1
Interrupt on EOL @ End of Block
0
Disable ...................................................default
1
Enable
0
Interrupt on FLAG @ End-of-Blk
0
Disable ...................................................default
1
Enable
I/O Offset 47-44 – Modem SGD R Ch Table Ptr Base ... RW
31-0 SGD Table Pointer Base Address (even addr).....W
Current Pointer Address ........................................R
I/O Offset 4F-4C – Modem SGD R Ch Current Count .. RO
31-24 Reserved
........................................ always reads 0
23-0 Current SGD Read Channel Count
SGD Table Format
63
62
61
60-56
EOL FLAG STOP
-reserved-
Revision 1.71 June 9, 2000
I/O Offset 50 – Modem SGD Write Channel Status ....... RO
7
6
5-4
3
2
1
0
I/O Offset 51 – Modem SGD Write Channel Control ... RW
7
6
5-4
3
2-0
I/O Offset 52 – Modem SGD Write Channel Type ........ RW
7
6-2
1
0
I/O Offset 57-54 – Modem SGD W Ch Table Ptr Base . RW
31-0 SGD Table Pointer Base Address (even addr) .... W
I/O Offset 5F-5C – Modem SGD W Ch Current Count . RO
31-24 Reserved
23-0 Current SGD Write Channel Count
EOL
FLAG Block Flag. If set, transfer pauses at the end of this
STOP Block Stop. If set, transfer pauses at the end of this
55-32
31-0
Base
Base
Count
Address
[23:0]
[31:0]
-112-
Function 5 & 6 Registers - AC97 Audio & Modem Codecs
SGD Active (0 = completed or terminated) ....... RO
SGD Paused ......................................................... RO
........................................always reads 0
Reserved
SGD Trigger Queued (will restart after EOL).. RO
SGD Stopped (write 1 to resume)................... RWC
SGD EOL
..................................................... RWC
SGD Flag
..................................................... RWC
SGD Start
............................WO (always reads 0)
0
No effect
1
Start SGD write channel operation
SGD Terminate.......................WO (always reads 0)
0
No effect
1
Terminate SGD write channel operation
Test (Do Not Program)....................... always write 0
SGD Pause ........................................................ RW
0
Release SGD write channel pause and resume
the transfer from the paused line
1
Pause SGD write channel operation (SGD
write channel pointer stays at current address)
Reserved
........................................always reads 0
Auto-Start SGD at EOL (1=Enable)........default = 0
Reserved
........................................always reads 0
Interrupt on EOL @ End of Block (1=Ena) ...def=0
Interrupt on FLAG @ End-of-Blk (1=Ena)....def=0
Current Pointer Address ....................................... R
........................................always reads 0
End Of Link. 1 indicates this block is the last of the
link. If the channel “Interrupt on EOL” bit is set, then
an interrupt is generated at the end of the transfer.
block. If the channel “Interrupt on FLAG” bit is set,
then an interrupt is generated at the end of this block.
block. To resume the transfer, write 1 to Rx?0[2].
VT82C686B