VT82C686B

Manufacturer Part NumberVT82C686B
ManufacturerETC-unknow
VT82C686B datasheet
 


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Page 64/128

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Offset 48 - Miscellaneous Control 3 ................................. RW
7-4
Reserved
........................................ always reads 0
3
Extra RTC Port 74/75 Enable
0
Disable ...................................................default
1
Enable
2
Integrated USB Controller Disable
0
Enable.....................................................default
1
Disable
1
Integrated IDE Controller Disable
0
Enable.....................................................default
1
Disable
0
512K PCI Memory Decode
0
Use Rx4E[15-12] to select top of PCI memory
1
Use contents of Rx4E[15-12] plus 512K as top
of PCI memory .......................................default
Offset 4A - IDE Interrupt Routing .................................. RW
7
Wait for PGNT Before Grant to ISA Master /
DMA
0
Disable ...................................................default
1
Enable
6
Bus Select for Access to I/O Devices Below 100h
0
Access ports 00-FFh via XD bus............default
1
Access ports 00-FFh via SD bus (applies to
external devices only; internal devices such as
the mouse controller are not effected)
5-4
Reserved (do not program) ..................... default = 0
3-2
IDE Second Channel IRQ Routing
00 IRQ14
01 IRQ15.....................................................default
10 IRQ10
11 IRQ11
1-0
IDE Primary Channel IRQ Routing
00 IRQ14.....................................................default
01 IRQ15
10 IRQ10
11 IRQ11
Revision 1.71 June 9, 2000
4C - ISA DMA/Master Memory Access Control 1 ........ RW
7-0
PCI Memory Hole Bottom Address
These bits correspond to HA[23:16] ............default=0
4D - ISA DMA/Master Memory Access Control 2 ........ RW
7-0
PCI Memory Hole Top Address (HA[23:16])
These bits correspond to HA[23:16] ............default=0
Note:
Access to the memory defined in the PCI memory
hole will not be forwarded to PCI. This function is
disabled if the top address is less than or equal to the
bottom address.
4F-4E - ISA DMA/Master Memory Access Control 3 ... RW
15-12 Top of PCI Memory for ISA DMA/Master accesses
0000 1M
.................................................... default
0001 2M
... ...
1111 16M
Note:
All ISA DMA / Masters that access addresses higher
than the top of PCI memory will not be directed to the
PCI bus.
11
Forward E0000-EFFFF Accesses to PCI........def=0
10
Forward A0000-BFFFF Accesses to PCI .......def=0
9
Forward 80000-9FFFF Accesses to PCI ........def=1
8
Forward 00000-7FFFF Accesses to PCI ........def=1
7
Forward DC000-DFFFF Accesses to PCI ......def=0
6
Forward D8000-DBFFF Accesses to PCI ......def=0
5
Forward D4000-D7FFF Accesses to PCI .......def=0
4
Forward D0000-D3FFF Accesses to PCI .......def=0
3
Forward CC000-CFFFF Accesses to PCI .....def=0
2
Forward C8000-CBFFF Accesses to PCI ......def=0
1
Forward C4000-C7FFF Accesses to PCI .......def=0
0
Forward C0000-C3FFF Accesses to PCI .......def=0
-58-
Function 0 Registers - PCI to ISA Bridge
VT82C686B