PIC16F688

Manufacturer Part NumberPIC16F688
ManufacturerMicrochip Technology Inc.
PIC16F688 datasheet
 


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Page 17/202:

INTCON Register

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2.2.2.3

INTCON Register

The INTCON register is a readable and writable
register, which contains the various enable and flag bits
for TMR0 register overflow, PORTA change and
external RA2/INT pin interrupts.
REGISTER 2-3:
INTCON: INTERRUPT CONTROL REGISTER
R/W-0
R/W-0
R/W-0
GIE
PEIE
T0IE
bit 7
Legend:
R = Readable bit
W = Writable bit
-n = Value at POR
‘1’ = Bit is set
bit 7
GIE: Global Interrupt Enable bit
1 = Enables all unmasked interrupts
0 = Disables all interrupts
bit 6
PEIE: Peripheral Interrupt Enable bit
1 = Enables all unmasked peripheral interrupts
0 = Disables all peripheral interrupts
bit 5
T0IE: Timer0 Overflow Interrupt Enable bit
1 = Enables the Timer0 interrupt
0 = Disables the Timer0 interrupt
bit 4
INTE: RA2/INT External Interrupt Enable bit
1 = Enables the RA2/INT external interrupt
0 = Disables the RA2/INT external interrupt
bit 3
RAIE: PORTA Change Interrupt Enable bit
1 = Enables the PORTA change interrupt
0 = Disables the PORTA change interrupt
bit 2
T0IF: Timer0 Overflow Interrupt Flag bit
1 = Timer0 register has overflowed (must be cleared in software)
0 = Timer0 register did not overflow
bit 1
INTF: RA2/INT External Interrupt Flag bit
1 = The RA2/INT external interrupt occurred (must be cleared in software)
0 = The RA2/INT external interrupt did not occur
bit 0
RAIF: PORTA Change Interrupt Flag bit
1 = When at least one of the PORTA <5:0> pins changed state (must be cleared in software)
0 = None of the PORTA <5:0> pins have changed state
Note 1:
IOCA register must also be enabled.
2:
T0IF bit is set when TMR0 rolls over. TMR0 is unchanged on Reset and should be initialized before
clearing T0IF bit.
© 2007 Microchip Technology Inc.
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE of the INTCON register.
User software should ensure the appropri-
ate interrupt flag bits are clear prior to
enabling an interrupt.
R/W-0
R/W-0
R/W-0
INTE
RAIE
T0IF
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
(2)
PIC16F688
R/W-0
R/W-x
INTF
RAIF
bit 0
x = Bit is unknown
DS41203D-page 15