NH82801GBM SL8YB

Manufacturer Part NumberNH82801GBM SL8YB
ManufacturerIntel Corporation
NH82801GBM SL8YB datasheet
 

Specifications of NH82801GBM SL8YB

CaseBGADate_code07+
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LPC Interface Bridge Registers (D31:F0)
10.9.7
TCO2_CNT—TCO2 Control Register
I/O Address:
TCOBASE +0Ah
Default Value:
0008h
Lockable:
No
Bit
15:6
Reserved
OS_POLICY — R/W. OS-based software writes to these bits to select the policy that
the BIOS will use after the platform resets due the WDT. The following convention is
recommended for the BIOS and OS:
00 = Boot normally
01 = Shut down
5:4
10 = Don’t load OS. Hold in pre-boot state and use LAN to determine next step
11 = Reserved
NOTE: These are just scratchpad bits. They should not be reset when the TCO logic
resets the platform due to Watchdog Timer.
GPIO11_ALERT_DISABLE — R/W. At reset (via RSMRST# asserted) this bit is set
and GPIO11 alerts are disabled.
3
0 = Enable.
1 = Disable GPIO11/SMBALERT# as an alert source for the heartbeats and the SMBus
slave.
INTRD_SEL — R/W. This field selects the action to take if the INTRUDER# signal goes
active.
00 = No interrupt or SMI#
2:1
01 = Interrupt (as selected by TCO_INT_SEL).
10 = SMI
11 = Reserved
0
Reserved
10.9.8
TCO_MESSAGE1 and TCO_MESSAGE2 Registers
I/O Address:
TCOBASE +0Ch (Message 1)
TCOBASE +0Dh (Message 2)
Default Value:
00h
Lockable:
No
Bit
TCO_MESSAGE[n] — R/W. The value written into this register will be sent out via the
7:0
SMLINK interface in the MESSAGE field of the Alert On LAN message. BIOS can write to
this register to indicate its boot progress which can be monitored externally.
®
Intel
ICH7 Family Datasheet
Attribute:
R/W
Size:
16-bit
Power Well:
Resume
Description
Attribute:
R/W
Size:
8-bit
Power Well: Resume
Description
461

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