PIC16F684-ISL

Manufacturer Part NumberPIC16F684-ISL
ManufacturerMicrochip Technology Inc.
PIC16F684-ISL datasheets
 


Specifications of PIC16F684-ISL

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Page 47/164

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5.0
TIMER0 MODULE
The Timer0 module timer/counter has the following
features:
• 8-bit timer/counter
• Readable and writable
• 8-bit software programmable prescaler
• Internal or external clock select
• Interrupt on overflow from FFh to 00h
• Edge select for external clock
Figure 5-1 is a block diagram of the Timer0 module and
the prescaler shared with the WDT.
Note:
Additional information on the Timer0
module is available in the “PICmicro
Mid-Range
MCU
Family
Manual” (DS33023).
5.1
Timer0 Operation
Timer mode is selected by clearing the T0CS bit
(OPTION_REG<5>). In Timer mode, the Timer0
module will increment every instruction cycle (without
prescaler). If TMR0 is written, the increment is inhibited
for the following two instruction cycles. The user can
work around this by writing an adjusted value to the
TMR0 register.
FIGURE 5-1:
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
CLKOUT
(= F
/4)
OSC
0
1
T0CKI
pin
0
T0CS
T0SE
1
PSA
WDTE
SWDTEN
Prescaler
31 kHz
Watchdog
INTRC
Timer
Note 1: T0SE, T0CS, PSA, PS<2:0> are bits in the Option register, WDTPS<3:0> are bits in the WDTCON register.
 2004 Microchip Technology Inc.
Counter mode is selected by setting the T0CS bit
(OPTION_REG<5>). In this mode, the Timer0 module
will increment either on every rising or falling edge of
pin RA2/T0CKI. The incrementing edge is determined
by
the
source
(OPTION_REG<4>). Clearing the T0SE bit selects the
rising edge.
Note:
Counter mode has specific external clock
requirements. Additional information on
these requirements is available in the
”PICmicro
Reference Manual” (DS33023).
5.2
Timer0 Interrupt
®
A Timer0 interrupt is generated when the TMR0
Reference
register timer/counter overflows from FFh to 00h. This
overflow sets the T0IF bit (INTCON<2>). The interrupt
can be masked by clearing the T0IE bit (INTCON<5>).
The T0IF bit must be cleared in software by the Timer0
module Interrupt Service Routine before re-enabling
this interrupt. The Timer0 interrupt cannot wake the
processor from Sleep since the timer is shut off during
Sleep.
8-bit
Prescaler
PSA
8
PS<2:0>
16-bit
16
PSA
WDTPS<3:0>
Preliminary
PIC16F684
edge
(T0SE)
control
®
Mid-Range
MCU
Family
Data Bus
8
1
SYNC 2
TMR0
Cycles
0
Set Flag bit T0IF
on Overflow
1
WDT
Time-out
0
DS41202C-page 45
bit