74avc1t45 NXP Semiconductors, 74avc1t45 Datasheet

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74avc1t45

Manufacturer Part Number
74avc1t45
Description
74avc1t45 Dual Supply Translating Transceiver; 3-state
Manufacturer
NXP Semiconductors
Datasheet

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1. General description
2. Features
The 74AVC1T45 is a single bit, dual supply transceiver with 3-state output that enables
bidirectional level translation. It features one data input-output port (A and B), a direction
control input (DIR) and dual supply pins (V
be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for
translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and
3.3 V). Pins A and DIR are referenced to V
on DIR allows transmission from A to B and a LOW on DIR allows transmission from B to
A.
The device is fully specified for partial power-down applications using I
circuitry disables the output, preventing any damaging backflow current through the
device when it is powered down. In suspend mode when either V
GND level, both A and B are in the high-impedance OFF-state.
74AVC1T45
Dual supply translating transceiver; 3-state
Rev. 01 — 18 January 2008
Wide supply voltage range:
High noise immunity
Complies with JEDEC standards:
ESD protection:
Maximum data rates:
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78 Class II
V
V
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
HBM JESD22-A114E Class 3B exceeds 8000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
500 Mbit/s (1.8 V to 3.3 V translation)
320 Mbit/s (< 1.8 V to 3.3 V translation)
320 Mbit/s (translate to 2.5 V or 1.8 V)
280 Mbit/s (translate to 1.5 V)
240 Mbit/s (translate to 1.2 V)
CC(A)
CC(B)
: 0.8 V to 3.6 V
: 0.8 V to 3.6 V
CC(A)
CC(A)
and pin B is referenced to V
and V
CC(B)
). Both V
CC(A)
Product data sheet
CC(A)
OFF
or V
and V
. The I
CC(B)
CC(B)
CC(B)
are at
. A HIGH
OFF
can

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74avc1t45 Summary of contents

Page 1

... Dual supply translating transceiver; 3-state Rev. 01 — 18 January 2008 1. General description The 74AVC1T45 is a single bit, dual supply transceiver with 3-state output that enables bidirectional level translation. It features one data input-output port (A and B), a direction control input (DIR) and dual supply pins (V be supplied at any voltage between 0 ...

Page 2

... Table 2. Marking Type number 74AVC1T45GW 74AVC1T45GM 5. Functional diagram 5 DIR CC(A) Fig 1. Logic symbol 74AVC1T45_1 Product data sheet circuitry provides partial Power-down mode operation Description SC-88 plastic surface-mounted package; 6 leads XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 Marking code ...

Page 3

... A and DIR ground (0 V) data input or output data input or output direction control supply voltage port B Input/output [ input Z . CC(A) Rev. 01 — 18 January 2008 74AVC1T45 Dual supply translating transceiver; 3-state 74AVC1T45 CC(A) CC(B) GND 2 5 DIR 001aag972 Transparent top view ...

Page 4

... Active mode Suspend or 3-state mode CC(A) CC( +125 C amb derates linearly with 4.0 mW/K. tot derates linearly with 2.4 mW/K. tot Conditions Active mode Suspend or 3-state mode 3.6 V CCI Rev. 01 — 18 January 2008 74AVC1T45 Min Max 0.5 +4.6 0.5 +4 [1] 0.5 +4 [1][2][3] 0 0.5 CCO [1] 0.5 +4 ...

Page 5

... 3.6 V CCI V = 0.8 V CCI 1.95 V CCI 2.7 V CCI 3.6 V CCI V = 0.8 V CCI 1.95 V CCI 2.7 V CCI 3.6 V CCI Rev. 01 — 18 January 2008 74AVC1T45 Dual supply translating transceiver; 3-state Min Typ Max - 0. 0. 0.025 0.25 [2] - 0.5 2 ...

Page 6

... A I CCI 0 3.6 V CC(A) CC( 3 CC(A) CC( 3.6 V CC(A) CC( CC(A) CC( CCI = 3.6 V CC(A) CC(B) Rev. 01 — 18 January 2008 74AVC1T45 Dual supply translating transceiver; 3-state Min Typ Max [ CCO ...

Page 7

... CC CC(A) CC CC(A) CC CC(A) CC 3.6 V CC(A) CC( CCO = 3.6 V CC(A) CC(B) Rev. 01 — 18 January 2008 74AVC1T45 Dual supply translating transceiver; 3-state Min Typ Max [1] 0.70V - - CCI 0.65V - - CCI 1 0.70V - - CC(A) 0.65V - - CC( ...

Page 8

... I CCI 0 3.6 V CC(A) CC( 3 CC(A) CC( 3.6 V CC(A) CC( CC(A) CC( CCI = 3.6 V CC(A) CC(B) Rev. 01 — 18 January 2008 74AVC1T45 Dual supply translating transceiver; 3-state Min Typ Max - - [ © NXP B.V. 2008. All rights reserved. ...

Page 9

... PLZ PHZ en Section 13.4 “Enable times” CC( where ns pF Rev. 01 — 18 January 2008 74AVC1T45 Dual supply translating transceiver; 3-state [ amb Figure 7; for wave forms see Figure 5 V CC(B) 1.2 V 1.5 V 1.8 V 8.1 7.6 7.7 12.7 12.3 12.2 12.2 12.2 12.2 7.9 7.6 8.2 20.6 19.9 20.4 20 ...

Page 10

... Min Max 1.0 9.0 0.7 6.8 1.0 9.0 0.8 8.0 2.2 8.8 2.2 8.8 2.2 8.4 1.8 6.7 - 17.4 - 14.7 - 17.8 - 15.6 1.0 8.0 0.7 5.4 1.0 6.8 0.8 5.4 1.6 6.3 1.6 6.3 2.0 7.6 1.8 5.9 - 14.4 - 11.3 - 14.3 - 11.7 1.0 7.7 0.6 5.1 1.0 6.1 0.7 4.6 1.6 5.5 1.6 5.5 1.8 7.7 1.8 5.7 - 13.8 - 10.3 - 13.2 - 10.6 1.0 7.2 0.5 4.7 1.0 5.7 0.6 3.8 1.5 4.2 1.5 4.2 1.7 7.3 2.0 5.2 - 13.0 - 9.0 - 11.4 - 8.9 1.0 7.1 0.5 4.5 1.0 6.1 0.6 3.6 1.5 4.7 1.5 4.7 1.7 7.2 0.7 5.5 - 13.3 - 9.1 - 11.8 - 9.2 is the same as t and the same as t dis PLZ PHZ en Section 13.4 “Enable times” Rev. 01 — 18 January 2008 74AVC1T45 Dual supply translating transceiver; 3-state [1] 7; for wave forms see Figure 5 and V CC(B) 0.15 V 2.5 V 0.2 V 3.3 V Min Max Min Max Min 0.6 6.1 0.5 5.7 0.5 0.7 7.7 0.6 7.2 0.5 2.2 8.8 2.2 8.8 2.2 2.0 6.9 1.7 6.2 2.4 - 14.6 - 13.4 - 14.9 - 14.5 0.6 4.6 0.5 3.7 0.5 0.7 5.1 0.6 4.7 0.5 1.6 6.3 1.6 6.3 1.6 1.6 6.0 1.2 4.8 1.7 - 11.1 - 9.5 - 10.9 - 10.0 0.5 4.3 0.5 3.4 0.5 0.5 4.4 0.5 3.9 0.5 1.6 5.5 1.6 5.5 1.6 1.4 5.8 1.0 4.5 1.5 - 10.2 - 8.4 - 9.8 - 8.9 0.5 3.9 0.5 3.0 0.5 0.5 3.4 0.5 3.0 0.5 1.5 4.2 1.5 4.2 1.5 1.5 5.1 0.6 4.2 1.1 - 8.5 - 7.2 - 8.1 - 7.2 0.5 3.7 0.5 2.8 ...

Page 11

... Min Max 1.0 9.9 0.7 7.5 1.0 9.9 0.8 8.8 2.2 9.7 2.2 9.7 2.2 9.2 1.8 7.4 - 19.1 - 16.2 - 19.6 - 17.2 1.0 8.8 0.7 6.0 1.0 7.5 0.8 6.0 1.6 7.0 1.6 7.0 2.0 8.3 1.8 6.5 - 15.8 - 12.5 - 15.8 - 13.0 1.0 8.5 0.6 5.7 1.0 6.8 0.7 5.1 1.6 6.1 1.6 6.1 1.8 8.5 1.8 6.3 - 15.3 - 11.4 - 14.6 - 11.8 1.0 8.0 0.5 5.2 1.0 6.3 0.6 4.2 1.5 4.7 1.5 4.7 1.7 8.0 2.0 5.8 - 14.3 - 10.0 - 12.7 - 9.9 1.0 7.9 0.5 5.0 1.0 6.8 0.6 4.0 1.5 5.2 1.5 5.2 1.7 7.9 0.7 6.1 - 14.7 - 10.1 - 13.1 - 10.2 is the same as t and the same as t dis PLZ PHZ en Section 13.4 “Enable times” Rev. 01 — 18 January 2008 74AVC1T45 Dual supply translating transceiver; 3-state [1] 7; for wave forms see Figure 5 and V CC(B) 0.15 V 2.5 V 0.2 V 3.3 V Min Max Min Max Min 0.6 6.8 0.5 6.3 0.5 0.7 8.5 0.6 8.0 0.5 2.2 9.7 2.2 9.7 2.2 2.0 7.6 1.7 6.9 2.4 - 16.1 - 14.9 - 16.5 - 16.0 0.6 5.1 0.5 4.1 0.5 0.7 5.7 0.6 5.2 0.5 1.6 7.0 1.6 7.0 1.6 1.6 6.6 1.2 5.3 1.7 - 12.3 - 10.5 - 12.1 - 11.1 0.5 4.8 0.5 3.8 0.5 0.5 4.9 0.5 4.3 0.5 1.6 6.1 1.6 6.1 1.6 1.4 6.4 1.0 5.0 1.5 - 11.3 - 9.3 - 10.9 - 9.9 0.5 4.3 0.5 3.3 0.5 0.5 3.8 0.5 3.3 0.5 1.5 4.7 1.5 4.7 1.5 1.5 5.7 0.6 4.7 1.1 - 9.5 - 8.0 - 9.0 - 8.0 0.5 4.1 0.5 3.1 ...

Page 12

... CCO PHZ GND outputs enabled Table 13. [1] [2] Output V M 0.5V CCO 0.5V CCO 0.5V CCO Rev. 01 — 18 January 2008 74AVC1T45 Dual supply translating transceiver; 3-state t PLH 001aae967 t PZL PZH V M outputs outputs disabled enabled 001aae968 0 ...

Page 13

... DUT R T Load [ 1.0 ns 1.0 ns 1.0 ns Rev. 01 — 18 January 2008 74AVC1T45 Dual supply translating transceiver; 3-state EXT 001aae331 V EXT PLH PHL PZH PHZ ...

Page 14

... The circuit given in unidirectional logic level-shifting application. Fig 8. Unidirectional logic level-shifting application Table 15. Pin 74AVC1T45_1 Product data sheet Figure example of the 74AVC1T45 being used CC1 V CC(A) 1 GND V CC1 system-1 Description unidirectional logic level-shifting application Name ...

Page 15

... [ HIGH voltage level LOW voltage level high-impedance OFF-state. 74AVC1T45_1 Product data sheet shows the 74AVC1T45 being used in a bidirectional logic level-shifting V CC1 CC1 V CC(A) 1 PULL-UP/DOWN GND system-1 gives a sequence that will illustrate data transmission from system-1 to system-2 ...

Page 16

... In a bidirectional application, these enable times provide the maximum delay from the time the DIR bit is switched until an output is expected. For example, if the 74AVC1T45 initially is transmitting from then the DIR bit is switched, the B port of the device must be disabled before presenting it with an input. After the B port has been disabled, an input signal applied to it appears on the corresponding A port after the specifi ...

Page 17

... scale 2.2 1.35 2.2 1.3 0.65 1.8 1.15 2.0 REFERENCES JEDEC JEITA SC-88 Rev. 01 — 18 January 2008 74AVC1T45 Dual supply translating transceiver; 3-state detail 0.45 0.25 0.2 0.2 0.1 0.15 0.15 EUROPEAN PROJECTION SOT363 ISSUE DATE ...

Page 18

... scale 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA MO-252 Rev. 01 — 18 January 2008 74AVC1T45 Dual supply translating transceiver; 3-state 4 ( EUROPEAN PROJECTION SOT886 ISSUE DATE 04-07-15 04-07-22 © NXP B.V. 2008. All rights reserved ...

Page 19

... Machine Model 16. Revision history Table 19. Revision history Document ID Release date 74AVC1T45_1 20080118 74AVC1T45_1 Product data sheet Dual supply translating transceiver; 3-state Data sheet status Change notice Product data sheet - Rev. 01 — 18 January 2008 74AVC1T45 Supersedes - © NXP B.V. 2008. All rights reserved ...

Page 20

... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 18 January 2008 74AVC1T45 Dual supply translating transceiver; 3-state © NXP B.V. 2008. All rights reserved ...

Page 21

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 18 January 2008 Document identifier: 74AVC1T45_1 ...

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