ADR510 Analog Devices, ADR510 Datasheet
ADR510
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ADR510 Summary of contents
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... Model ADR510ART-REEL7 1.000 A TRIM terminal is available on the ADR510 to provide adjust- ment of the output voltage over 0.5% without affecting the temperature coefficient of the device. This feature provides users with the flexibility to trim out any system errors. ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADR510 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... TEMPERATURE ( C) TPC 1. Typical V vs. Temperature OUT TIME (400ns/DIV) TPC 2. Turn-On Time TIME (400 s/DIV) TPC 3. Turn-On Time with 1 µ F Input Capacitor REV. 0 Typical Performance Characteristics–ADR510 5V/DIV 500 V/DIV OUT TPC 5. Turn-Off Time with 1 µ F Input Capacitor ...
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... R • R BIAS rent to the ADR510 even when the supply voltage is at its minimum and the load current is at its maximum value. • R BIAS exceed 10 mA when the supply voltage is at its maximum and the load current is at its minimum. ...
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... Figure 2. Adjustable Precision Voltage Source Output Voltage Trim Using a mechanical or digital potentiometer, the output voltage of the ADR510 can be trimmed ± 0.5%. The circuit in Figure 3 illustrates how the output voltage can be trimmed, using a 10 kΩ potentiometer. Note that trimming using other resistor values may not produce an accurate output from the ADR510 ...
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... ADR510 OUTLINE DIMENSIONS 3-Lead Small Outline Transistor Package [SOT-23] (RT-3) Dimensions shown in millimeters 3.04 2.90 2.80 1.40 1.30 1.20 3 2.64 2. PIN 1 0.95 BSC 1.90 BSC 1.12 0.89 0.10 0.01 0.60 0.50 0.50 0.30 0.40 SEATING PLANE COMPLIANT TO JEDEC STANDARDS TO-236AB –6– 0.20 0.08 REV. 0 ...
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