ics83905 Integrated Device Technology, ics83905 Datasheet

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ics83905

Manufacturer Part Number
ics83905
Description
Low Skew, 1 6 Crystal-to- Lvcmos/lvttl Fanout Buffer
Manufacturer
Integrated Device Technology
Datasheet

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LOW SKEW, 1:6 CRYSTAL-TO-
LVCMOS/LVTTL FANOUT BUFFER
P
IDT
G
transmission lines. The effective fanout can be increased from 6
to 12 by utilizing the ability of the outputs to drive two series
terminated lines.
The ICS83905 is characterized at full 3.3V, 2.5V, and 1.8V,
mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating
supply mode. Guaranteed output and part-to-part skew char-
acteristics along with the 1.8V output capabilities makes the
ICS83905 ideal for high performance, single ended applica-
tions that also require a limited output voltage.
4mm x 4mm x 0.925mm
HiPerClockS™
IC S
IN
20-Lead VFQFN
ENERAL
ICS83905
body package
K Package
/ ICS
Top View
A
XTAL_OUT
ENABLE 2
4.4mm x 5.0mm x 0.925mm
3.9mm x 9.9mm x 1.38mm
SSIGNMENTS
BCLK0
BCLK1
BCLK2
LVCMOS/LVTTL FANOUT BUFFER
GND
GND
V
The ICS83905 is a low skew, 1-to-6 LVCMOS / LVTTL
Fanout Buffer and a member of the HiPerClockS™
family of High Performance Clock Solutions from IDT.
The low impedance LVCMOS/LVTTL outputs are de-
signed to drive 50
DD
16-Lead TSSOP
o
16-Lead SOIC
body package
body package
D
ICS83905
M Pacakge
G Pacakge
Top View
Top View
1
2
3
4
5
6
7
8
ESCRIPTION
BCLK0
BCLK1
GND
GND
V
16
15
14
13
12
11
10
DDO
9
XTAL_IN
ENABLE 1
BCLK5
V
BCLK4
GND
BCLK3
V
DDO
DD
1
2
3
4
5
20 19 18 17 16
6
series or parallel terminated
7
8
9 10
15
14
13
12
11
BCLK5
V
BCLK4
GND
GND
DDO
1
XTAL_OUT
ENABLE 1
ENABLE 2
F
B
XTAL_IN
Six LVCMOS / LVTTL outputs
Outputs able to drive 12 series terminated lines
Crystal oscillator interface
Crystal input frequency range: 10MHz to 40MHz
Output skew: 80ps (maximum)
RMS phase jitter @ 25MHz, (100Hz - 1MHz):
0.26ps (typical) (V
Phase noise:
5V tolerant enable inputs
Synchronous output enables
Operating power supply modes:
Full 3.3V, 2.5V and 1.8V,
mixed 3.3V core/2.5V output operating supply,
mixed 3.3V core/1.8V output operating supply,
mixed 2.5V core/1.8V output operating supply
0°C to 70°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
EATURES
100kHz ............. -157.3 dBc/Hz
LOCK
Offset
100Hz ............. -129.7 dBc/Hz
10kHz ............. -147.3 dBc/Hz
1kHz ............. -144.4 dBc/Hz
D
IAGRAM
SYNCHRONIZE
SYNCHRONIZE
DD
Noise Power
= V
DDO
ICS83905AM REV. B JANUARY 24, 2008
= 2.5V)
ICS83905
BCLK0
BCLK1
BCLK2
BCLK3
BCLK4
BCLK5

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ics83905 Summary of contents

Page 1

... The effective fanout can be increased from utilizing the ability of the outputs to drive two series terminated lines. The ICS83905 is characterized at full 3.3V, 2.5V, and 1.8V, mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating supply mode. Guaranteed output and part-to-part skew char- acteristics along with the 1.8V output capabilities makes the ICS83905 ideal for high performance, single ended applica- tions that also require a limited output voltage ...

Page 2

... ICS83905AM REV. B JANUARY 24, 2008 ...

Page 3

... ICS83905AM REV. B JANUARY 24, 2008 ...

Page 4

... ICS83905AM REV. B JANUARY 24, 2008 ...

Page 5

... ICS83905AM REV. B JANUARY 24, 2008 ...

Page 6

... ICS83905AM REV. B JANUARY 24, 2008 ...

Page 7

... ICS83905AM REV. B JANUARY 24, 2008 ...

Page 8

... Raw Phase Noise Data 100 FFSET REQUENCY ORE UTPUT 25MHz RMS Phase Jitter (Random) 100Hz to 1MHz = 0.26ps (typical) 10k 100k 3. ORE UTPUT 25MHz RMS Phase Jitter (Random) 100Hz to 1MHz = 0.13ps (typical) 10k 100k ICS83905AM REV. B JANUARY 24, 2008 ...

Page 9

... DD Qx LVCMOS C 2.5 C /1.8V O IRCUIT ORE 9 I NFORMATION SCOPE Qx /2. UTPUT OAD EST IRCUIT 1.25V±5% SCOPE V DDO Qx GND /2. UTPUT OAD EST IRCUIT 0.9V±0.1V V DDO Qx GND -0.9V±0. UTPUT OAD EST IRCUIT ICS83905AM REV. B JANUARY 24, 2008 SCOPE ...

Page 10

... KEW 80% 20% Clock t Outputs UTPUT ISE ALL IME IDT ™ / ICS ™ LVCMOS/LVTTL FANOUT BUFFER BCLKx O D UTPUT UTY 80% 20 PERIOD 100% odc = t PERIOD YCLE ULSE IDTH ERIOD ICS83905AM REV. B JANUARY 24, 2008 ...

Page 11

... I RYSTAL NPUT NTERFACE Figure 2 shows an example of ICS83905 crystal interface with a parallel resonant crystal. The frequency accuracy can be fine tuned by adjusting the C1 and C2 values. For a parallel crystal with loading capacitance CL = 18pF, we suggest C1 = 15pF and C2 = 15pF to start with. These values may be slightly fine tuned ...

Page 12

... Note on the Surface Mount Assembly of Amkor’s Thermally/ Electrically Enhance Leadfame Base Package, Amkor Technology. EXPOSED HEAT SLUG THERMAL VIA XPOSED AD HERMAL ELEASE 12 : UTPUTS SOLDER PIN LAND PATTERN PIN PAD (GROUND PAD) – ATH IDE IEW RAWING NOT TO CALE ICS83905AM REV. B JANUARY 24, 2008 ) ...

Page 13

... LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER L G AYOUT UIDELINE Figure 5 shows an example of ICS83905 application schematic. In this example, the device is operated at V 3.3V. The decoupling capacitors should be located as close as possible to the power pins. The input is driven by an 18pF load resonant quartz crystal. The tuning capacitors (C1, C2) are fairly ...

Page 14

... ABLE VS IR LOW ABLE FOR JA Multi-Layer PCB, JEDEC Standard Test Boards T C RANSISTOR OUNT The transistor count for ICS83905 is: 339 Pin compatible to MPC905 IDT ™ / ICS ™ LVCMOS/LVTTL FANOUT BUFFER R I ELIABILITY NFORMATION 16 L SOIC EAD by Velocity (Meters per Second) ...

Page 15

... ° 0 ° ICS83905AM REV. B JANUARY 24, 2008 TSSOP m ...

Page 16

... Reference Document: JEDEC Publication 95, MO-220 VFQFN EAD ICS83905AM REV. B JANUARY 24, 2008 ...

Page 17

... ° & ° ICS83905AM REV. B JANUARY 24, 2008 ° ° ° ° ° ° ° ° ...

Page 18

... ICS83905AM REV. B JANUARY 24, 2008 ...

Page 19

... ICS83905 LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 +408 284 8200 (outside U.S.) © ...

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