ics8545-02 Integrated Device Technology, ics8545-02 Datasheet

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ics8545-02

Manufacturer Part Number
ics8545-02
Description
Low Skew, 1-to-4 Lvcmos/lvttl-to-lvds Fanout Buffer
Manufacturer
Integrated Device Technology
Datasheet
LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS
FANOUT BUFFER
Description
the ICS8545-02 provides a low power, low noise, solution for
distributing clock signals over controlled impedances of 100Ω. The
ICS8545-02 accepts an LVCMOS/LVTTL input level and translates
it to 3.3V LVDS output levels.
Guaranteed output and part-to-part skew characteristics make the
ICS8545-02 ideal for those applications demanding well defined
performance and repeatability.
Block Diagram
IDT™ / ICS™ LVDS FANOUT BUFFER
HiPerClockS™
CLK_SEL
ICS
CLK_EN
CLK1
CLK2
OE
Pullup
Pulldown
Pulldown
Pulldown
Pullup
The ICS8545-02 is a low skew, high performance
1-to-4 LVCMOS/LVTTL-to-LVDS Clock Fanout
Buffer and a member of the HiPerClockS™ family of
High Performance Clock Solutions from IDT.
Utilizing Low Voltage Differential Signaling (LVDS)
0
1
0
1
nD
LE
Q
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
1
Features
Four differential LVDS output pairs
Two LVCMOS/LVTTL clock inputs to support redundant
or selectable frequency fanout applications
Maximum output frequency: 350MHz
Translates LVCMOS/LVTTL input signals to LVDS levels
Output skew: 60ps (maximum)
Part-to-part skew: 450ps (maximum)
Propagation delay: 1.45ns (maximum)
Additive phase jitter, RMS: 0.14ps (typical)
Full 3.3Vsupply mode
0°C to 70°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
Pin Assignment
6.5mm x 4.4mm x 0.925
CLK_SEL
CLK_EN
CLK1
CLK2
GND
GND
20-Lead TSSOP
V
OE
package body
DD
nc
nc
ICS8545-02
G Package
Top View
1
2
3
4
5
6
7
8
9
10
ICS8545AG-02 REV. A March 3, 2009
20
19
18
17
16
15
14
13
12
11
Q0
V
Q1
nQ1
nQ2
Q3
nQ0
Q2
nQ3
DD
mm
ICS8545-02

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ics8545-02 Summary of contents

Page 1

... HiPerClockS™ High Performance Clock Solutions from IDT. Utilizing Low Voltage Differential Signaling (LVDS) the ICS8545-02 provides a low power, low noise, solution for distributing clock signals over controlled impedances of 100Ω. The ICS8545-02 accepts an LVCMOS/LVTTL input level and translates it to 3.3V LVDS output levels. ...

Page 2

... ICS8545-02 LOW SKEW, 1-TO-4, LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER Table 1. Pin Descriptions Number Name GND Power 2 CLK_EN Input 3 CLK_SEL Input 4 CLK1 Input Unused 6 CLK2 Input 8 OE Input 10 Power DD 11, 12 Q3, Q3 Output 14, 15 Q2, Q2 Output 16, 17 Q1, Q1 Output 19, 20 Q0, Q0 Output NOTE: Pullup and Pulldown refer to internal input resistors ...

Page 3

... ICS8545-02 LOW SKEW, 1-TO-4, LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER Function Tables Table 3A. Control Input Function Table OE CLK_EN After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as shown in Figure 1. In the active mode, the state of the outputs are a function of the CLK1 and CLK2 inputs as described in Table 3B. ...

Page 4

... ICS8545-02 LOW SKEW, 1-TO-4, LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER Absolute Maximum Ratings NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability ...

Page 5

... ICS8545-02 LOW SKEW, 1-TO-4, LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER AC Electrical Characteristics Table 5. AC Characteristics Parameter Symbol f Output Frequency MAX t Propagation Delay; NOTE 1 PD Buffer Additive Phase Jitter, RMS; tjit refer to Additive Phase Jitter Section tsk(o) Output Skew; NOTE 2, 4 tsk(pp) Part-to-Part Skew; NOTE 3, 4 ...

Page 6

... ICS8545-02 LOW SKEW, 1-TO-4, LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER Additive Phase Jitter The spectral purity in a band at a specific offset from the fundamental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a Phase noise plot and is most often the specified plot in many applications ...

Page 7

... ICS8545-02 LOW SKEW, 1-TO-4, LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER Parameter Measurement Information V DD 3.3V±5% POWER SUPPLY LVDS + – Float GND - 3.3V LVDS Output Load AC Test Circuit Par t 1 nQx Qx Par t 2 nQy Qy tsk(pp) Part-to-Part Skew nQ0:nQ3 Q0: PERIOD t PW odc = t PERIOD Output Duty Cycle/Pulse Width/Period IDT™ ...

Page 8

... ICS8545-02 LOW SKEW, 1-TO-4, LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER Parameter Measurement Information, continued 80% Clock 20% Outputs t R Output Rise/Fall Time V DD LVDS DC Input ➤ Offset Voltage Setup IDT™ / ICS™ LVDS FANOUT BUFFER 80 Input 20 Differential Output Voltage Setup out ➤ ...

Page 9

... ICS8545-02 LOW SKEW, 1-TO-4, LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER Application Information Recommendations for Unused Input and Output Pins Inputs: CLK Inputs For applications not requiring the use of a clock input, it can be left floating. Though not required, but for additional protection, a 1kΩ resistor can be tied from the CLK input to ground. ...

Page 10

... Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS8545-02 is the sum of the core power plus the power dissipated in the load(s). The following is the power dissipation for V NOTE: Please refer to Section 3 for details on calculating power dissipated in the load. ...

Page 11

... Air Flow Table for a 20 Lead TSSOP JA Meters per Second Multi-Layer PCB, JEDEC Standard Test Boards Transistor Count The transistor count for ICS8545-02 is: 360 Package Outline and Package Dimension Package Outline - G Suffix for 20 Lead TSSOP IDT™ / ICS™ LVDS FANOUT BUFFER θ ...

Page 12

... ICS8545-02 LOW SKEW, 1-TO-4, LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER Ordering Information Table 9. Ordering Information Part/Order Number Marking ICS8545AG-02 ICS8545AG-02 ICS8545AG-02T ICS8545AG-02 ICS8545AG-02LF ICS8545AG-02LF ICS8545AG-02LFT ICS8545AG-02LF NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. ...

Page 13

... ICS8545-02 LOW SKEW, 1-TO-4, LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 +408 284 8200 (outside U.S.) © ...

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