IDT7027 Integrated Device Technology, Inc., IDT7027 Datasheet
IDT7027
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IDT7027 Summary of contents
Page 1
... IL 2. BUSY and INT are non-tri-state totem-pole outputs (push-pull). ©2000 Integrated Device Technology, Inc. HIGH-SPEED 32K x 16 DUAL-PORT STATIC RAM external logic IDT7027 easily expands data bus width to 32 bits or more using the Master/Slave select when cascading more than one device M M ...
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... Military, Industrial and Commercial Temperature Ranges circuitry of each port to enter a very low standby power mode. Fabricated using IDT’s CMOS high-performance technology, these devices typically operate on only 750mW of power. The IDT7027 is packaged in a 100-pin Thin Quad Flatpack (TQFP) and a 108-pin ceramic Pin Grid Array (PGA). ...
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... This package code is used to reference the package diagram. 5. This text does not indicate orientation of the actual part-marking. Military, Industrial and Commercial Temperature Ranges SEM A NC GND R R 14R R/W 13R 12R BUSY R IDT7027G (4) G108 108-Pin PGA (5) Top View 102 A 3L 106 GND 10L 13L SEM 14L Vcc R ...
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... IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM < 0. > V -0. NOTES: 1. Chip Enable references are shown above with the actual CE 2. Port "A" and "B" references are located where CE is used. 3. "H" and "L" (1) Inputs NOTES — — 14L 0R 14R. 2. Refer to Chip Enable Truth Table. ...
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... IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM Symbol Rating Commercial & Industrial (2) V Terminal Voltage -0.5 to +7.0 TERM with Respect to GND Temperature -55 to +125 T BIAS Under Bias T Storage -65 to +150 STG Temperature I DC Output 50 OUT Current NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device ...
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... IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM Symbol Parameter Test Condition Dynamic Operating , Outputs Disabled CC IL SEM = V Current IH (3) (Both Ports Active MAX Standby Current SB1 L R SEM = SEM (Both Ports - TTL Level R (3) Inputs MAX CE I Standby Current = V SB2 "A" ...
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... IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM dInput Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load Symbol Parameter READ CYCLE t Read Cycle Time RC t Address Access Time AA (3) t Chip Enable Access Time ACE (3) t Byte Enable Access Time ...
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... IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM ADDR ( UB, LB R/W DATA OUT BUSY OUT ( NOTES: 1. Timing depends on which signal is asserted last, CE, OE, LB, or UB. 2. Timing depends on which signal is de-asserted first CE, OE, LB, or UB. delay is required only in cases where the opposite port is completing a write operation to the same address location. For simultaneous read operations BUSY 3 ...
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... IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM Symbol Parameter WRITE CYCLE t Write Cycle Time WC (3) t Chip Enable to End-of-Write EW t Address Valid to End-of-Write AW (3) t Address Set-up Time AS t Write Pulse Width WP t Write Recovery Time WR t Data Valid to End-of-Write DW (1,2) t Output High-Z Time ...
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... IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM ADDRESS OE (9,10 SEM ( ( R/W DATA OUT DATA IN ADDRESS (9,10 SEM ( ( R/W DATA IN NOTES and during all address transitions write occurs during the overlap ( measured from the earlier R/W (or SEM or R/W) going HIGH to the end of write cycle. ...
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... IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM VALID ADDRESS SEM I R/W OE NOTES and for the duration of the above timing (both write and read cycle), refer to Chip Enable Truth Table "DATA VALID" represents all I/O's (I/O -I/O OUT 0 A 0"A" (2) SIDE "A" ...
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... IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM Symbol Parameter BUSY TIMING (M/S BUSY Access Time from Address Match t BAA BUSY Disable Time from Address Not Matched t BDA BUSY Acce ss Time from Chip Enable Low t BAC BUSY Acce ss Time from Chip Enable High ...
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... IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM ADDR "A" R/W "A" DATA IN "A" (1) t APS ADDR "B" BUSY "B" DATA OUT "B" NOTES ensure that the earlier of the two ports wins (refer to Chip Enable Truth Table for the reading port. IL (slave), BUSY is an input. Then for this example BUSY 4 ...
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... IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM BUSY ADDR "A" and "B" CE "A" t (2) APS CE "B" BUSY "B" BUSY S ADDR "A" t APS ADDR "B" BUSY "B" NOTES: 1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from port “A”. ...
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... IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM ADDR "A" "A" R/W "A" INT "B" ADDR "B" "B" OE "B" INT "B" NOTES: 1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from port “A”. ...
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... NOTES: 1. Pins BUSY and BUSY are both outputs when the part is configured as a master. Both are inputs when configured as a slave. BUSY outputs on the IDT7027 are L R push-pull, not open drain outputs. On slaves the BUSY input internally inhibits writes. 2. "L" if the inputs to the opposite port were stable prior to the address and enable inputs of this port. "H" if the inputs to the opposite port became stable after the address is not met, either BUSY and enable inputs of this port ...
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... The IDT7027 is a fast Dual-Port 32K x 16 CMOS Static RAM with an additional 8 address locations dedicated to binary semaphore flags. These flags allow either processor on the left or right side of the Dual-Port SRAM to claim a privilege over the other processor for functions defined by the system designer’ ...
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... The eight semaphore flags reside within the IDT7027 in a separate memory space from the Dual-Port SRAM. This address space is accessed by placing a low input on the SEM pin (which acts as a chip select for the semaphore flags) and using the other control pins (Address, OE, and R/W) as they would be used in accessing a standard Static RAM ...
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... IDT7027S/L High-Speed 32K x 16 Dual-Port Static RAM IDT XXXXX A 999 Device Power Speed Type NOTE: 1. Industrial temperature range is available on selected TQFP packages in standard power. For other speeds, packages and powers contact your sales office. 1/15/99: Initiated datasheet document history Converted to new format ...