LTC1864L Linear Technology, LTC1864L Datasheet
LTC1864L
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LTC1864L Summary of contents
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... A. The supply current drops at lower speeds because the LTC1864L/LTC1865L automatically power down between conversions. These 16-bit switched capacitor successive approximation ADCs include sample-and-holds. The LTC1864L has a differential analog input with an external reference pin. The LTC1865L offers a software- selectable 2-channel MUX and an external reference pin on the MSOP version. ...
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... No Missing Codes Resolution INL (Note 3) Transition Noise Gain Error 2 U (Notes 1, 2) Operating Temperature Range LTC1864LC/LTC1865LC/ LTC1864LAC/LTC1865LAC .................... LTC1864LI/LTC1865LI/ + 0.3V) CC LTC1864LAI/LTC1865LAI ................. – Storage Temperature Range ................. – 150 C + 0.3V) CC Lead Temperature (Soldering, 10 sec)................. 300 ORDER PART NUMBER LTC1864LCMS8 CONV 1 CH0 2 ...
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... Input Differential Voltage – Range + Absolute Input Range IN Input – IN Input V Input Range LTC1864L SO-8 and MSOP, LTC1865L MSOP REF Analog Input Leakage Current (Note 4) C Input Capacitance In Sample Mode IN During Conversion ACCURACY 3V 3V ...
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... SCK + t CONV 45% 1/f 45% 1/f t CONV 16 26 LTC1864L/LTC1865L MIN TYP MAX UNITS 3.7 4.66 150 120 35 120 the case of the LTC1864L SCK does SCK(MAX) 18645Lf V MHz s SCK SCK SCK SCK s SCK ns s kHz ...
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... TEMPERATURE ( C) 1864L/65L G05 Typical DNL Curve 2. 2.5V REF f = 150kHz –1 –2 0 32768 49152 65536 16384 CODE 1865 G03 LTC1864L/LTC1865L Sleep Current vs Temperature 150kHz 2. 2.5V REF –50 – 100 125 TEMPERATURE ( C) 1864L/65L G03 ...
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... LTC1864L/LTC1865L W U TYPICAL PERFOR A CE CHARACTERISTICS Change in Offset vs Reference Voltage 150kHz 3. –5 –10 –15 – REFERENCE VOLTAGE (V) 1864L/65L G10 Change in Gain Error vs Temperature 2. 2.5V REF –1 –2 –3 –4 –5 – ...
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... CH0, CH1 (Pins 2, 3): Analog Inputs. These inputs must be free of noise with respect to GND. GND (Pin 4): Analog Ground. GND should be tied directly to an analog ground plane. LTC1864L/LTC1865L down. A logic low on this input enables the SDO pin, allowing the data to be shifted out. SDO (Pin 6): Digital Data Output. The A/D conversion result is shifted out of this pin ...
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... LTC1864L/LTC1865L U U FUNCTIONAL BLOCK DIAGRA PIN NAMES IN PARENTHESES REFER TO LTC1865L + IN (CH0) – IN (CH1) GND TEST CIRCUITS Load Circuit for dDO r f TEST POINT 3k SDO 20pF Voltage Waveforms for t CONV SDO t en Voltage Waveforms for SDO Delay Times, t SCK dDO ...
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... If CONV is left high after this time, the LTC1864L goes into sleep mode drawing only leakage current. On the falling edge of CONV, the LTC1864L goes into sample mode and SDO is enabled. SCK synchronizes the data transfer with each bit being transmitted from SDO on the falling SCK edge ...
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... LTC1864L/LTC1865L U U APPLICATIO S I FOR ATIO LTC1865L OPERATION Operating Sequence The LTC1865L conversion cycle begins with the rising edge of CONV. After a period equal to t sion is finished. If CONV is left high after this time, the LTC1865L goes into sleep mode drawing only leakage current. The LTC1865L’ ...
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... F tantalum. Keep the bypass capacitor leads as short as possible. Analog Inputs Because of the capacitive redistribution A/D conversion techniques used, the analog inputs of the LTC1864L/ LTC1865L have capacitive switching input current spikes. These current spikes settle quickly and do not cause a problem if source resistances are less than 200 or high speed op amps are used (e ...
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... LTC1864L/LTC1865L U U APPLICATIO S I FOR ATIO 18645Lf ...
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... U U APPLICATIO S I FOR ATIO Component Side Silk Screen for LTC1864L Evaluation Circuit Component Side Showing Traces (Note Wider Traces on Analog Side) Ground Layer with Separate Analog and Digital Grounds W U (Note Almost No Analog Traces on Board Bottom) Supply Layer with 5V Digital Supply and Analog Ground Repeated ...
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... LTC1864L/LTC1865L PACKAGE DESCRIPTIO 5.23 (.206) MIN 0.42 0.04 (.0165 .0015) TYP RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) GAUGE PLANE 0.18 (.077) NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006" ...
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... TYP 0.53 0.01 (.021 .006) 1.10 (.043) DETAIL “A” MAX SEATING PLANE 0.17 – 0.27 (.007 – .011) TYP LTC1864L/LTC1865L .189 – .197 NOTE .150 – .157 (3.810 – 3.988) NOTE .004 – .010 (0.101 – 0.254) .050 (1 ...
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... LTC1864L/LTC1865L U TYPICAL APPLICATIO V IN AGND 1 F LTC6910-1 (IN TSOT-23 PACKAGE) COMPACTLY ADDS 40dB OF INPUT GAIN RANGE TO THE LTC1864L (IN MSOP 8-PIN PACKAGE). SINGLE 3V SUPPLY RELATED PARTS PART NUMBER SAMPLE RATE 12-Bit Serial I/O ADCs LTC1860L/LTC1861L 150ksps LTC1860/LTC1861 250ksps 14-Bit Serial I/O ADCs LTC1417 400ksps LTC1418 ...