LTC2247 Linear Technology, LTC2247 Datasheet

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LTC2247

Manufacturer Part Number
LTC2247
Description
(LTC2246 - LTC2248) 65/40/25Msps Low Power 3V ADCs
Manufacturer
Linear Technology
Datasheet

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www.datasheet4u.com
FEATURES
APPLICATIO S
TYPICAL APPLICATIO
ANALOG
INPUT
REFH
REFL
Sample Rate: 65Msps/40Msps/25Msps
Single 3V Supply (2.7V to 3.4V)
Low Power: 205mW/120mW/75mW
74.3dB SNR
90dB SFDR
No Missing Codes
Flexible Input: 1V
575MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Pin Compatible Family
125Msps: LTC2253 (12-Bit), LTC2255 (14-Bit)
105Msps: LTC2252 (12-Bit), LTC2254 (14-Bit)
80Msps: LTC2229 (12-Bit), LTC2249 (14-Bit)
65Msps: LTC2228 (12-Bit), LTC2248 (14-Bit)
40Msps: LTC2227 (12-Bit), LTC2247 (14-Bit)
25Msps: LTC2226 (12-Bit), LTC2246 (14-Bit)
10Msps: LTC2225 (12-Bit), LTC2245 (14-Bit)
32-Pin (5mm × 5mm) QFN Package
Wireless and Wired Broadband Communication
Imaging Systems
Ultrasound
Spectral Analysis
Portable Instrumentation
+
CLOCK/DUTY
REFERENCE
INPUT
CONTROL
FLEXIBLE
S/H
CYCLE
CLK
U
P-P
to 2V
PIPELINED
ADC CORE
14-BIT
P-P
Range
U
CORRECTION
LOGIC
DRIVERS
OUTPUT
2249 TA01a
DESCRIPTIO
The LTC
40Msps/25Msps, low power 3V A/D converters designed
for digitizing high frequency, wide dynamic range signals.
The LTC2248/LTC2247/LTC2246 are perfect for demand-
ing imaging and communications applications with AC
performance that includes 74.3dB SNR and 90dB SFDR
for signals at the Nyquist frequency.
DC specs include ±1LSB INL (typ), ±0.5LSB DNL (typ) and
no missing codes over temperature. The transition noise
is a low 1LSB
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic.
A single-ended CLK input controls converter operation. An
optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
All other trademarks are the property of their respective owners.
LTC2248/LTC2247/LTC2246
, LTC and LT are registered trademarks of Linear Technology Corporation.
OGND
OV
D13
D0
DD
®
2248/LTC2247/LTC2246 are 14-bit 65Msps/
RMS
.
Low Power 3V ADCs
14-Bit, 65/40/25Msps
U
75
74
73
72
71
70
LTC2248: SNR vs Input Frequency,
0
–1dB, 2V Range, 65Msps
50
INPUT FREQUENCY (MHZ)
100
150
2249 TAO1b
200
224876fa
1

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LTC2247 Summary of contents

Page 1

... DESCRIPTIO The LTC 40Msps/25Msps, low power 3V A/D converters designed for digitizing high frequency, wide dynamic range signals. The LTC2248/LTC2247/LTC2246 are perfect for demand- ing imaging and communications applications with AC performance that includes 74.3dB SNR and 90dB SFDR Range for signals at the Nyquist frequency. ...

Page 2

... Analog Input Voltage (Note 3) ..... –0. Digital Input Voltage .................... –0. Digital Output Voltage ................ –0.3V to (OV Power Dissipation ............................................ 1500mW Operating Temperature Range LTC2248C, LTC2247C, LTC2246C ........... 0°C to 70°C LTC2248I, LTC2247I, LTC2246I ..........–40°C to 85°C Storage Temperature Range ..................–65°C to 125° VERTER CHARACTERISTICS ...

Page 3

... MIN TYP ±0.5V to ±1V ● ● 1 1.5 ● 0.5 1.5 ● –1 DD ● –3 ● –3 0 0.2 80 575 LTC2247 LTC2246 MIN TYP MAX MIN TYP 74.4 74.5 72.9 74.2 72.9 74.4 73.9 73.4 73 74.4 74 ...

Page 4

... MIN TYP MAX ● 2 ● 0.8 ● – 2.995 ● 2.7 2.99 0.005 ● 0.09 0.4 2.49 0.09 1.79 0.09 LTC2247 LTC2246 MIN TYP MAX MIN TYP MAX 2.7 3 3.4 2.7 3 3.4 0.5 3 3.6 0 120 144 ...

Page 5

... Note 3: When these pin voltages are taken below GND or above V will be clamped by internal diodes. This product can handle input currents of greater than 100mA below GND or above V Note 3V 65MHz (LTC2248), 40MHz (LTC2247 SAMPLE 25MHz (LTC2246), input range = 2V with differential drive, unless P-P otherwise noted ...

Page 6

... LTC2248/LTC2247/LTC2246 W TYPICAL PERFOR A CE CHARACTERISTICS LTC2248: 8192 Point FFT 5MHz, –1dB, 2V Range, IN 65Msps www.datasheet4u.com 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY (MHz) LTC2248: 8192 Point FFT 70MHz, –1dB, 2V Range, IN 65Msps 0 –10 –20 –30 –40 – ...

Page 7

... OVDD 5MHz Sine Wave Input, –1dB 1.8V VDD SAMPLE RATE (Msps) 2248 G15 LTC2247: 8192 Point FFT 5MHz, –1dB, 2V Range, IN 40Msps 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 12288 ...

Page 8

... FREQUENCY (MHz) 2247 G05 LTC2247: SNR vs Input Frequency, –1dB, 2V Range, 40Msps 546 100 INPUT FREQUENCY (MHz) 2247 G08 LTC2247: SNR vs Input Level 5MHz, 2V Range, 40Msps ...

Page 9

... W TYPICAL PERFOR A CE CHARACTERISTICS LTC2247: SFDR vs Input Level, www.datasheet4u.com f = 5MHz, 2V Range, 40Msps IN 120 110 dBFS 100 90 80 dBc 70 90dBc SFDR 60 REFERENCE LINE –60 –50 –40 –30 –20 –10 INPUT LEVEL (dBFS) LTC2246: Typical INL, 2V Range, 25Msps 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 – ...

Page 10

... LTC2248/LTC2247/LTC2246 W TYPICAL PERFOR A CE CHARACTERISTICS LTC2246: 8192 Point 2-Tone FFT 10.9MHz and 13.8MHz, IN –1dB, 2V Range, 25Msps www.datasheet4u.com 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY (MHz) LTC2246: SFDR vs Input Frequency, –1dB, 2V Range, 25Msps ...

Page 11

... Connecting SHDN to V results in sleep mode with the outputs at high impedance. OE (Pin 11): Output Enable Pin. Refer to SHDN pin function. LTC2248/LTC2247/LTC2246 D0 – D13 (Pins 12, 13, 14, 15, 16, 17, 18, 19, 22, 23, 24, 25, 26, 27): Digital Outputs. D13 is the MSB. OGND (Pin 20): Output Driver Ground. ...

Page 12

... LTC2248/LTC2247/LTC2246 U U FUNCTIONAL BLOCK DIAGRA + A IN INPUT FIRST PIPELINED S/H – ADC STAGE 1.5V CM REFERENCE 2.2µF RANGE SELECT REF SENSE BUF DIAGRA ANALOG INPUT CLK D0-D13 SECOND PIPELINED THIRD PIPELINED ...

Page 13

... SNR JITTER CONVERTER OPERATION As shown in Figure 1, the LTC2248/LTC2247/LTC2246 is a CMOS pipelined multistep converter. The converter has six pipelined ADC stages; a sampled analog input will result in a digitized value five cycles later (see the Timing Diagram section). For optimal AC performance the analog inputs should be driven differentially ...

Page 14

... SAMPLE/HOLD OPERATION AND INPUT DRIVE Sample/Hold Operation Figure 2 shows an equivalent circuit for the LTC2248/ LTC2247/LTC2246 CMOS differential sample-and-hold. The analog inputs are connected to the sampling capaci- tors (C ) through NMOS transistors. The capacitors SAMPLE shown attached to each input (C tion of all other capacitance associated with each input ...

Page 15

... Poor matching will result in higher even order harmonics, especially the second. Input Drive Circuits Figure 3 shows the LTC2248/LTC2247/LTC2246 being driven transformer with a center tapped second- ary. The secondary center tap is DC biased with V setting the ADC input signal at its optimum DC level. ...

Page 16

... Input Frequencies Above 300MHz Reference Operation Figure 9 shows the LTC2248/LTC2247/LTC2246 refer- ence circuitry consisting of a 1.5V bandgap reference, a difference amplifier and switching and control circuit. The internal voltage reference can be configured for two pin selectable input ranges of 2V (±1V differential (± ...

Page 17

... U a low-jitter squaring circuit before the CLK pin (see Figure 11). The noise performance of the LTC2248/LTC2247/LTC2246 can depend on the clock signal quality as much as on the analog input. Any noise present on the clock signal will result in additional aperture jitter that will be RMS summed with the inherent ADC aperture jitter ...

Page 18

... CLK signal should have a 50% (±5%) duty cycle. Each half cycle must have at least 7.3ns (LTC2248), 11.8ns (LTC2247), and 18.9ns (LTC2246) for the ADC internal circuitry to have enough settling time for proper operation. An optional clock duty cycle stabilizer circuit can be used if the input clock has a non 50% duty cycle ...

Page 19

... APPLICATIO S I FOR ATIO As with all high speed/high resolution converters, the digital output loading can affect the performance. The digital outputs of the LTC2248/LTC2247/LTC2246 should www.datasheet4u.com drive a minimal capacitive load to avoid possible interac- tion between the digital outputs and sensitive input cir- cuitry ...

Page 20

... Heat Transfer Most of the heat generated by the LTC2248/LTC2247/ LTC2246 is transferred from the die through the bottom- side exposed pad and package leads onto the printed circuit board. For good electrical and thermal perfor- mance, the exposed pad should be soldered to a large grounded pad on the PC board ...

Page 21

... U U APPLICATIO S I FOR ATIO www.datasheet4u.com LTC2248/LTC2247/LTC2246 W U 224876fa 21 ...

Page 22

... LTC2248/LTC2247/LTC2246 U U APPLICATIO S I FOR ATIO Silkscreen Top www.datasheet4u.com Inner Layer 2 GND Topside Inner Layer 3 Power 224876fa ...

Page 23

... RECOMMENDED SOLDER PAD LAYOUT Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. LTC2248/LTC2247/LTC2246 Package 32-Lead Plastic QFN (5mm × ...

Page 24

... ADC, Lowest Power LTC2239 10-Bit, 80Msps, 3V ADC, Lowest Power LTC2245 14-Bit, 10Msps, 3V ADC, Lowest Power LTC2246 14-Bit, 25Msps, 3V ADC, Lowest Power LTC2247 14-Bit, 40Msps, 3V ADC, Lowest Power LTC2248 14-Bit, 65Msps, 3V ADC, Lowest Power LTC2249 14-Bit, 80Msps, 3V ADC, Lowest Power LTC2250 ...

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