MC10EP51 ON Semiconductor, MC10EP51 Datasheet
MC10EP51
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MC10EP51 Summary of contents
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... MC10EP51, MC100EP51 3. ECL D Flip−Flop with Reset and Differential Clock Description The MC10/100EP51 is a differential clock D flip−flop with reset. The device is functionally equivalent to the EL51 and LVEL51 devices. The reset input is an asynchronous, level triggered signal. Data enters the master portion of the flip−flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock ...
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RESET Flip-Flop CLK 3 CLK 4 Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 3. ATTRIBUTES Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity, Indefinite Time Out of ...
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Table 4. MAXIMUM RATINGS Symbol Parameter V PECL Mode Power Supply CC V NECL Mode Power Supply EE V PECL Mode Input Voltage I NECL Mode Input Voltage I Output Current out T Operating Temperature Range A T Storage Temperature ...
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Table 6. 10EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...
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Table 8. 100EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note 12 Output LOW Voltage (Note 12 Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...
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Table 10. 100EP DC CHARACTERISTICS, NECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note 18 Output LOW Voltage (Note 18 Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...
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FREQUENCY (MHz) Figure Driver Device ...
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... ORDERING INFORMATION Device MC10EP51D MC10EP51DG MC10EP51DR2 MC10EP51DR2G MC10EP51DT MC10EP51DTG MC10EP51DTR2 MC10EP51DTR2G MC10EP51MNR4G MC100EP51D MC100EP51DG MC100EP51DR2 MC100EP51DR2G MC100EP51DT MC100EP51DTG MC100EP51DTR2 MC100EP51DTR2G MC100EP51MNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ...
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... C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004) ...
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K 8x REF 0.10 (0.004) 0.15 (0.006 L −U− PIN 1 IDENT 0.15 (0.006 −V− C 0.10 (0.004) −T− D SEATING G PLANE PACKAGE DIMENSIONS TSSOP−8 ...
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... COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. MILLIMETERS DIM MIN MAX A 0.80 1.00 A1 0.00 0.05 A3 0.20 REF b 0.20 0.30 D 2.00 BSC D2 1.10 1.30 E 2.00 BSC E2 0.70 0.90 e 0.50 BSC K 0.20 −−− L 0.25 0.35 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC10EP51/D ...