MC14007 ON Semiconductor, MC14007 Datasheet

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MC14007

Manufacturer Part Number
MC14007
Description
Dual Complementary Pair Plus Inverter
Manufacturer
ON Semiconductor
Datasheet

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MC14007UB
Dual Complementary Pair
Plus Inverter
N–channel and three P–channel enhancement mode devices packaged
to provide access to each device. These versatile parts are useful in
inverter circuits, pulse–shapers, linear amplifiers, high input
impedance amplifiers, threshold detectors, transmission gating, and
functional gating.
2. Maximum Ratings are those values beyond which damage to the device
3. Temperature Derating:
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V
to the range V
either V
MAXIMUM RATINGS
March, 2000 – Rev. 3
Symbol
V
The MC14007UB multi–purpose device consists of three
I
This device contains protection circuitry to guard against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
Schottky TTL Load Over the Rated Temperature Range
precautions must be taken.
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or One Low–power
Pin–for–Pin Replacement for CD4007A or CD4007UB
This device has 2 outputs without ESD Protection. Anti–static
in
in
Semiconductor Components Industries, LLC, 2000
may occur.
Plastic “P and D/DW” Packages: – 7.0 mW/ _ C From 65 _ C To 125 _ C
V
T
P
, V
, I
T
T
stg
DD
D
A
L
out
out
SS
or V
DC Supply Voltage Range
Input or Output Voltage Range
Input or Output Current
Power Dissipation,
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
SS
DD
(DC or Transient)
(DC or Transient) per Pin
per Package (Note 3.)
(8–Second Soldering)
v
). Unused outputs must be left open.
(V
in
Parameter
or V
(Voltages Referenced to V
out
)
v
V
DD
.
in
and V
– 0.5 to V
– 0.5 to +18.0
SS
– 55 to +125
– 65 to +150
out
) (Note 2.)
Value
500
260
should be constrained
10
DD
+ 0.5
1
Unit
mW
mA
V
V
C
C
C
1. For ordering information on the EIAJ version of
MC14007UBCP
MC14007UBD
MC14007UBDR2
MC14007UBDT
MC14007UBF
MC14007UBFEL
the SOIC packages, please contact your local
ON Semiconductor representative.
Device
A
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
http://onsemi.com
CASE 948G
CASE 751A
SOEIAJ–14
DT SUFFIX
TSSOP–14
= Assembly Location
CASE 646
CASE 965
D SUFFIX
P SUFFIX
F SUFFIX
SOIC–14
PDIP–14
SOEIAJ–14
SOEIAJ–14
TSSOP–14
Package
SOIC–14
SOIC–14
PDIP–14
Publication Order Number:
14
2500/Tape & Reel
14
14
1
1
1
MC14007UBCP
DIAGRAMS
MARKING
See Note 1.
See Note 1.
MC14007UB/D
14
MC14007U
AWLYYWW
AWLYWW
AWLYWW
1
Shipping
2000/Box
14007U
55/Rail
96/Rail
ALYW
007U
14

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MC14007 Summary of contents

Page 1

... MC14007UB Dual Complementary Pair Plus Inverter The MC14007UB multi–purpose device consists of three N–channel and three P–channel enhancement mode devices packaged to provide access to each device. These versatile parts are useful in inverter circuits, pulse–shapers, linear amplifiers, high input impedance amplifiers, threshold detectors, transmission gating, and functional gating ...

Page 2

... MC14007UB PIN ASSIGNMENT D– S– GATE 3 B S– D– GATE DRAIN S = SOURCE SCHEMATIC PIN PIN INPUT INPUT OUTPUT CONDITION INPUT OPEN OPEN Substrates of P–channel devices internally connected to V ...

Page 3

... I (50 pF – 50) Vfk where (per package pF MC14007UB (Voltages Referenced Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î – Î Î Î ...

Page 4

... Vdc – 16 – 20 – 10 – 8.0 – 6 DRAIN VOLTAGE (Vdc) DS Figure 2. Typical Output Source Characteristics These typical curves are not guarantees, but are design aids. MC14007UB = pF Î Î Î Î Î Î Î Î Î Vdc Î ...

Page 5

... PULSE in GENERATOR Figure 4. Switching Time and Power Dissipation Test Circuit and Waveforms The MC14007UB dual pair plus inverter, which has access to all its elements offers a number of unique circuit applications. Figures 1, 5, and 6 are a few examples of the device flexibility DISABLE 3 ...

Page 6

... K D SEATING 14 PL PLANE 0.25 (0.010 MC14007UB PACKAGE DIMENSIONS P SUFFIX PLASTIC DIP PACKAGE CASE 646–06 ISSUE M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN B 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. ...

Page 7

... SEATING G D PLANE PLASTIC EIAJ SOIC PACKAGE VIEW 0.13 (0.005) M 0.10 (0.004) MC14007UB PACKAGE DIMENSIONS DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948G–01 ISSUE 0.25 (0.010 –U– F DETAIL Ç Ç Ç ...

Page 8

... Email: ONlit–asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–8549 Phone: 81–3–5740–2745 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 8 MC14007UB/D ...

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