NB7L111MMN ON Semiconductor, NB7L111MMN Datasheet

NB7L111MMN

Manufacturer Part Number

NB7L111MMN

Description

IC DRVR CLK/DATA 2:10 DIFF 52QFN

Manufacturer

ON Semiconductor

Type

Fanout Buffer (Distribution), Multiplexer , Datar

Datasheet

1.NB7L111MMNR2G.pdf (13 pages)

Specifications of NB7L111MMN

Number Of Circuits

Ratio - Input:output

2:10

Differential - Input:output

Yes/Yes

Input

CML, LVCMOS, LVDS, LVNECL, LVPECL, LVTTL

Output

CML

Frequency - Max

5.5GHz

Voltage - Supply

2.375 V ~ 3.465 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

52-VFQFN Exposed Pad

Frequency-max

5.5GHz

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

NB7L111MMNG

Manufacturer:

ON Semiconductor

Quantity:

Company:

Meier Automation Equipment Co., Limited

Part Number:

NB7L111MMNG

Manufacturer:

ON/安森美

Quantity:

20 000

Company:

Meier Automation Equipment Co., Limited

Part Number:

NB7L111MMNR2G

Manufacturer:

ON/安森美

Quantity:

20 000

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NB7L111M

2.5V / 3.3V, 6.125Gb/s 1:10

Differential Clock/Data

Driver with CML Output

Description

driver, designed with clock/data distribution in mind. It accepts two

clock/data sources into multiplexer input and reproduces ten identical

CML differential outputs. This device is ideal for clock/data

distribution across the backplane or a board, and redundant clock

switchover applications.

external reference voltage is provided). Differential inputs incorporate

internal 50 W termination resistors and accept Negative ECL (NECL),

Positive ECL (PECL), LVCMOS, LVTTL, CML, or LVDS (using

appropriate power supplies). The differential 16 mA CML output

provides matching internal 50 W termination, and 400 mV output

swing when externally terminated 50 W to V

3.3 V $5% supply and is guaranteed over the full industrial

temperature range of −40°C to +85°C. This device is packaged in a

low profile 8x8 mm, QFN−52 package with 0.5 mm pitch (see

package dimension on the back of the datasheet).

at www.onsemi.com.

Features

•

*For additional information on our Pb−Free strategy and soldering details, please

August, 2009 − Rev. 4

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

The NB7L111M is a low skew 1–to–10 differential clock/data

The input signals can be either differential or single–ended (if the

The NB7L111M operates from a 2.5 V $5% supply or a

Application notes, models, and support documentation are available

Maximum Input Clock Frequency > 5.5 GHz Typical

Maximum Input Data Rate > 6.125 Gb/s Typical

< 0.5 ps Maximum Clock RMS Jitter

< 15 ps Maximum Data Dependent Jitter at 3.125 Gb/s

50 ps Typical Rise and Fall Times

240 ps Typical Propagation Delay

2 ps Typical Duty Cycle Skew

10 ps Typical Within Device Skew

15 ps Typical Device−to−Device Skew

Operating Range: V

400 mV Differential CML Output Swing

50 W Internal Input and Output Termination Resistors

Pb−Free Packages are Available*

= 2.5 V $5 and 3.3 V $5

CC .

See detailed ordering and shipping information in the package

dimensions section on page 12 of this data sheet.

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

MARKING DIAGRAM*

http://onsemi.com

CASE 485M

MN SUFFIX

AWLYYWWG

= Assembly Site

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

QFN−52

NB7L

111M

Publication Order Number:

NB7L111M/D

Related parts for NB7L111MMN

NB7L111MMN Summary of contents

Page 1

... W Internal Input and Output Termination Resistors • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2009 August, 2009 − Rev ...

Page 2

Exposed Pad (EP VTCLK0 2 3 CLK0 CLK0 4 VTCLK0 5 VTSEL 6 7 SEL SEL 8 VTSEL 9 VTCLK1 10 11 CLK1 CLK1 12 VTCLK1 13 Figure 1. Pinout (Top View VTCLK0 ...

Page 3

Table 2. PIN DESCRIPTION Pin Name 15, 24, 27, 39, 42 18, 21, 26, 30, 33 36, 40, 45 VTCLK0 3 CLK0 4 CLK0 5 VTCLK0 6 VTSEL 7 SEL 8 SEL ...

Page 4

Table 3. ATTRIBUTES Input Default State Resistors ESD Protection Moisture Sensitivity (Note 3) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 3. For additional information, see Application Note AND8003/D. Table 4. MAXIMUM RATINGS (Note 4) ...

Page 5

Table 5. DC CHARACTERISTICS V Symbol Characteristic I Power Supply Current (Inputs and Outputs Open Output HIGH Voltage (Notes 6 and Output LOW Voltage (Notes 6 and 7) OL DIFFERENTIAL INPUT DRIVEN SINGLE−ENDED (See Figures ...

Page 6

Table 6. AC CHARACTERISTICS V Symbol Characteristic V Output Voltage Amplitude (@ V OUTPP (See Figures and 2.375 V to 2.625 3.135 V to 3.465 Maximum Operating ...

Page 7

INPUT CLOCK FREQUENCY (GHz) Figure 3. Output Voltage Amplitude vs. Input Clock Frequency and Temperature (V = 400 mV; V inpp CC 400 350 ...

Page 8

Device DDJ = 6 ps TIME (22.1 ps/div) Figure 8. Typical Output Waveform at 3.125 Gb/s with PRBS 2 Device DDJ=16ps TIME (22.1 ps/div) Figure 9. Typical Output Waveform at 5 Gb/s with PRBS 2 Device DDJ=12ps TIME (22.1 ps/div) ...

Page 9

CLK CLK Q Q NB7L111M Figure 12. Typical Termination for 16 mA Output Drive and Device Evaluation CLK V th CLK V th Figure 13. Differential Input Driven Single−Ended thmax IHmax V ILmax ...

Page 10

Table 7. Interfacing Options INTERFACING OPTIONS CML Connect VTCLK0, VTCLK0, VTCLK1, VTCLK1, VTSEL, VTSEL to V LVDS Connect VTCLK0, VTCLK0 together for CLK0 input; Connect VTCLK1, VTCLK1 together for CLK1 input; Connect VTSEL, VTSEL together for SEL control input. AC−COUPLED ...

Page 11

Application Information All NB7L111M inputs can accept LVPECL, CML, LVTTL, LVCMOS and LVDS signal levels. The limitations for differential input signal (LVDS, PECL, or CML) are minimum input swing and the maximum input CML ...

Page 12

... LVCMOS Driver V EE Figure 21. LVCMOS/LVTTL to CML Receiver Interface ORDERING INFORMATION Device NB7L111MMN NB7L111MMNG NB7L111MMNR2 NB7L111MMNR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/ Connect No Connect V REF Package QFN− ...

Page 13

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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