NCV7361A ON Semiconductor, NCV7361A Datasheet
NCV7361A
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NCV7361A Summary of contents
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... NCV7361A Advance Information Voltage Regulator with Integrated LIN Transceiver The NCV7361A consists of a low drop voltage regulator, 5.0 V/50 mA and a LIN bus transceiver. The LIN transceiver “LIN−Protocol Specification” Rev. 1.3, 2.0 and SAE J2602. The combination of voltage regulator and bus transceiver make it ideal for a powerful and inexpensive cost effective slave node in a LIN Bus system ...
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... BUS LIN bus line. 5 RxD Receive output (push−pull TxD Transmit input (pullup−input RESET Reset output, active low (pullup Regulator output 5.0 V/50 mA. OUT NCV7361A Control Amplifier Current Limitation + VBG − I VAUX POR V SUP UVR Mode Wake−Up ...
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... FR4. 3. psi−JL2 temperature was made at foot of lead #2. NCV7361A ELECTRICAL SPECIFICATIONS these limits may do so. Long term exposure to limiting values may affect the reliability of the device. Correct operating of the device can’t be guaranteed if any of these limits are exceeded ...
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... RESET Threshold Master Reset Threshold (Note 5) 4. See Figure 6 for test setup. 5. Not production tested, guaranteed by design and qualification. 6. Measured when the output voltage has dropped 100 mV from the V NCV7361A (5. − 125 C unless otherwise noted) SUP ...
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... Output Voltage High 7. See Figures 7, 8, and 9 for test setup. 8. The recessive voltage on BUS should be less than 80% direct battery the battery and −0.7 V. SUP SUP BAT NCV7361A (5. − 125 C unless otherwise noted) SUP A Condition , thr_rec thr_dom thr_cnt 7 ...
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... Minimal Recessive Bit Time (Notes 15 and 16) Maximum Recessive Bit Time (Notes 15 and 16) Duty Cycle 1 Duty Cycle 2 15. See Timing Diagrams. 16. See Test Circuits for Dynamic and Static Characteristics. NCV7361A (7 − 125 C unless otherwise noted) SUP A Symbol Condition 5 ...
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... V BUS 95% 50% BUS RxD Figure 2. Timing Diagram for Propagation Delay V BUS 100% 95% BUS 40 sdom Figure 3. Timing Diagram for Slope Times NCV7361A TIMING DIAGRAMS 100 df_RxD 50% According to LIN 1.3 and 2.0 V dom According to LIN 1.3 http://onsemi.com 7 t dr_TxD 50 dr_RxD 60% ...
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... Figure 5. Test Circuit for Delay Time, Slope Time, and Duty Cycle IS1 GND BUS Figure 6. Test Circuit for Supply Current I http://onsemi.com NCV7361A t BIT t rec(min) 74.4% 42.2% t rec(max) TEST CIRCUITS NCV7361A V SUP OUT + 10 mF RESET TxD RxD 50 pF NCV7361A V SUP OUT + 10 mF RESET TxD RxD Snl 8 58.1% 28.4% 100 nF 100 nF ...
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... Figure 8. Test Circuit for Bus Voltage “Dominant’’ V NCV7361A V BAT V SUP EN GND I INBUSR A BUS Figure 9. Test Circuit for Bus Current “Recessive’’ I NCV7361A 13 SUP EN GND BUS Figure 10. Test Circuit for V Rise Time vs. Load Capacitance and Resistance OUT http://onsemi.com (continued) V ...
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... Rise Time with a 100 mF Load Figure 13. V out Capacitor and 1 kW, 200 W, and 100 W Load using EN to Enable the Output. NCV7361A Rise Time with Load Figure 12. V out Capacitor and 1 kW, 200 W, and 100 W Load using EN to Enable the Output. ...
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... JREC Figure 15. State Diagram of Operating Modes Sleep Mode Sleep mode is most current saving. With a falling edge on EN (EN = Low) the NCV7361A is switched from normal mode into sleep mode. The voltage regulator will be switched off and the LIN transceiver is in recessive state. http://onsemi.com ...
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... T J (typical 140 C) the NCV7361A will be recover to the previous state (normal or sleep). Initialization Initialization is started if the power supply is switched on as well as every rising edge on of the NCV7361A via the EN pin. V − Power On SUP switched on the NCV7361A starts to normal SUP mode via the POR− ...
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... This diode prevents reverse current additional termination resistor is necessary to use the NCV7361A in LIN slave nodes. If this IC is used for LIN master nodes necessary to terminate the bus pin with an external 1.0 kW resistor in series with a diode to V ...
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... DV/DT v 2.5 V/ms. This principle provides good symmetry of the slope times between recessive to dominant and dominant to recessive slopes within the LIN bus load range ( BUS term The NCV7361A guarantees data rates within the complete bus load range under worst case conditions. MCU V CC NCV7361A V V ...
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... Figure 22. Output Current of Reset Output vs. Initialization The initialization is started independent of the EN pin. V Power ON SUP The NCV7361A starts in the normal mode when V applied [>3.15 V (typical)]. The internal circuitry SUP as well as the internal regulator starts the initialization with power−on−reset. The voltage regulator is switched on > ...
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... The wide input voltage range allows different EN control . If the input voltage possibilities. If the EN input is connected to an CMOS , the second current output of the MCU, a falling edge switches the NCV7361A into sleep mode (the regulator is also switched off). The wake−up is only possible via the bus line. 1000 ...
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... If the application does not need the wake−up capability of the NCV7361A, a direct connection possible. In this case, the NCV7361A operates in permanent normal mode. Also possible is the external (outside of the module) control of the EN line via a V signal. Wake−Up If the regulator standby (sleep) mode, it can be woken up with the BUS interface ...
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... This problem can be solved only by adjusting the master termination resistor to the required maximum network time constant of 5.0 ms (max). The LIN bus output driver of the NCV7361A provides a higher drive capability than necessary ( 1.2 V) within the LIN standard (33 1.2 V). With this driver stage the system designer can increase the maximum LIN networks with a total network capacitance of more than 10 nF ...
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... Figure 28 shows the dependence of power dissipation of the transmitter as function of V conditions for calculation the power dissipation was: = 500 nF, Bitrate = 20 kbit and duty cycle TxD of 50%. NCV7361A MIN/MAX SLOPE TIME CALCULATION V dom Figure 27. Slope Time Calculation ...
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... Amplitudes of mathematical solution are not the resistance values. Figure 29. Grounded Capacitor Thermal Network (“Cauer” Ladder) R Junction Each rung is exactly characterized by its RC−product time constant; Am- plitudes are the resistances Figure 30. Non−Grounded Capacitor Thermal Ladder (“Foster” Ladder) NCV7361A 714 mm Cauer Network 714 mm Units 1.08E− ...
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... Duty Cycle 100 10 0.1 Single Pulse 0.01 0.000001 0.00001 0.0001 Figure 33. SO−8 Thermal Duty Cycle Curves on 1.0 in. Spreader Test Board NCV7361A 300 400 500 2 Copper Area ( Function of the Pad Copper Area Including Traces, JA Board Material Cu Area = 89.7 mm 0.001 0.01 0.1 Time ( Area = 713 ...
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... C is only possible with A small voltage differences between V Figure 34 for safe operating areas for different ambient and junction temperatures. Regulator Circuitry Low Dropout Regulator The voltage regulator of the NCV7361A is a low dropout regulator (LDO) with a P−MOSFET driving transistor. This type of regulator has a standard pole, generated ...
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... ESR from the temperature and is therefore well suitable as V Aluminum Capacitors These capacitors show a strong influence of the capacity and the ESR from the temperature. These characteristic restrains the usability as load capacity for the low drop regulator of NCV7361A. NCV7361A V V SUP OUT ...
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... V BAT 100nF 1 k 220pF Master Node + 1k 100mF 100nF 100nF 220pF Slave Node *Not representative of actual pinout. Figure 37. Application Circuit for LIN Sub−Bus with NCV7361A as Slave Node NCV7361A V OUT + 100mF 100nF GND 100nF NCV7380* NC RxD VS NC BUS V CC GND TxD ...
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... LIN bus. This state can only be detected from the LIN controller. In this case the controller must switch−off the LIN node via the EN input of the NCV7361A and look for a recessive state. A thermal shutdown of NCV7361A will appear if the thermal shutdown threshold is exceeded. ...
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... U Burst 100 ns/10 ms/90 ms Break NCV7361A ESD Test The NCV7361A is tested according to MIL883−3015.7 (Human Body Model). EMC The test on EMC impacts is done according to ISO 7637−1 for power supply pins and ISO 7637−3 for data and signal pins. Condition = 5.0 s/U = − ...
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... 0.25 (0.010 −Y− SEATING PLANE −Z− 0.25 (0.010 NCV7361A PACKAGE DIMENSIONS SOIC− SUFFIX CASE 751−07 ISSUE 0.10 (0.004 SOLDERING FOOTPRINT 1.52 0.060 7.0 4.0 0.275 0.155 0.6 1.270 0.024 ...
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... USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 28 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. NCV7361A/D ...