rsc-4128 ETC-unknow, rsc-4128 Datasheet

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rsc-4128

Manufacturer Part Number
rsc-4128
Description
Speech Recognition Processor
Manufacturer
ETC-unknow
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
RSC-4128
Manufacturer:
SENSORY
Quantity:
20 000
Part Number:
RSC-4128
Manufacturer:
Sensory
Quantity:
18 573
General Description
The RSC-4128 represents Sensory’s next generation
speech and analog I/O mixed signal processor. The
RSC-4128 is designed to bring high performance
speech I/O features to cost sensitive embedded and
consumer
microcontroller, the RSC-4128 integrates speech-
optimized digital and analog processing blocks into a
single chip solution capable of accurate speech
recognition; high quality, low data-rate compressed
speech; and advanced music. Products can use one
or all features in a single application.
The RSC-4128 operates in tandem with the radically
new FluentChip™ technology, offering the best
speech recognition technologies in the industry.
FluentChip™ includes Hidden Markov Model-Neural
Net hybrid speech recognition. Accuracy in all kinds
of noise is dramatically improved.
Verification technology is perfect for voice password
security applications that must work in noisy
environments. New high quality compressed speech
technology reduces data rates by 5 times. New 8-
voice MIDI-compatible music includes drum tracks,
effectively
Simultaneous music and speech round out the
FluentChip™ technology.
FluentChip™ technology tools also support the
revolutionary
independent recognition sets by simply typing in the
desired recognition vocabulary! A few keystrokes
creates a recognition set in seconds without the wait
or cost of recording sessions to train the recognizer,
speeding time to sales.
A new and unique Audio Wakeup feature listens
while the RSC-4128 is in power down mode. When
an audio event such as a clap or whistle occurs,
Audio Wakeup will wakeup the RSC-4128 for speech
or application tasks.
battery applications that require continuous listening
and long battery life.
In addition to best-in-class recognition performance,
the RSC-4128 provides further on-chip integration of
features. A complete speech I/O application can be
built with as few additional parts as a clock crystal,
speaker,
capacitors.
© 2006 Sensory Inc.
microphone,
increasing
products.
capability
Audio Wakeup is perfect for
and
instruments
Based
of
few
creating
on
resistors
New Speaker
beyond
an
speaker
P/N 80-0206-R
8-bit
and
8.
Moreover, the RSC-4128 provides an unprecedented
level
integration, enabling many applications that require
DSP and/or audio processing. The RSC-4128 may
be used as
processor
technologies and applications.
Features
Full Range of FluentChip™ Capabilities
Integrated Single-Chip Solution
Long Battery Life
Full Suite of Quick & Powerful Tools
Speech Recognition Processor
Many languages now available for international use
High quality, 2.4-7.8 kbps speech synthesis & sound
effects, with Sensory SX
8 voice MIDI-compatible music synthesis coincident with
speech; drum track feature enables additional voices
Voice Record & Playback (voice memo)
Audio Wake Up from sleep with whistles or claps
Touch Tone (DTMF) output
8-bit microcontroller
128K bytes ROM
16 bit ADC, 10 bit DAC & PWM, and microphone pre-
amplifier
Independent, programmable Digital Filter engine
4.8 KBytes total RAM (262 bytes “user” application RAM)
Five timers (3 GP, 1 Watchdog, 1 Multi Tasking)
Twin-DMA, Vector Math accelerator, and Multiplier
Built-in Analog Comparator Unit (4 inputs)
External memory bus: 20-bit Address(1Mbyte), 8-bit Data
On chip storage for SD, SV, templates (10 templates)
24 configurable I/O lines with 10 mA (typical) outputs
Code security - no ROM dump capability
Uses low cost 3.58MHz crystal (internal PLL)
Low EMI design for FCC and CE requirements
Fully nested interrupt structure with up to 8 sources
Optional Real Time Clock
2.4 – 3.6V operation
12mA (typical) operating current at 3V
2 low power modes; 1
Quick Text-to-SI (T2SI™) text entry to build noise robust
SI recognition sets: low cost & push-button–no recording!
QuickSynthesis™ 4 for push-button speech compression
Integrated Development Environment, C Compiler,
Debugger & In Circuit Emulator from Phyton, Inc.
Noise-robust
Dependent recognition
Speaker Verification – voice password biometric security
Word Spotting and Continuous Listening recognition
options
of
cost
platform
Speaker
a general-purpose mixed signal
effective
µ
A typical sleep current
for
Independent
synthesis technology
system-on-chip
custom
RSC-4128
and
Data Sheet
algorithms,
Speaker
(SOC)
1

Related parts for rsc-4128

rsc-4128 Summary of contents

Page 1

... A new and unique Audio Wakeup feature listens while the RSC-4128 is in power down mode. When an audio event such as a clap or whistle occurs, Audio Wakeup will wakeup the RSC-4128 for speech or application tasks. ...

Page 2

... ARITHMETIC/LOGICAL Group Instructions ....................................................................................................................................................... 36 MISCELLANEOUS Group Instructions ............................................................................................................................................................... 37 Special Functions Registers (SFRs) Summary............................................................................................................................. 38 DC Characteristics........................................................................................................................................................................ 40 A.C. Characteristics (External memory accesses)........................................................................................................................ 40 Timing Diagrams........................................................................................................................................................................... 41 Absolute Maximum Ratings .......................................................................................................................................................... 41 Package Options .......................................................................................................................................................................... 42 Die Pad Ring ................................................................................................................................................................................ 45 RSC-4128 Die Bonding Pad Locations......................................................................................................................................... 46 Mechanical Data ........................................................................................................................................................................... 47 2 P/N 80-0206-R Data Sheet © 2006 Sensory Inc. ...

Page 3

... RSC-4128 processor avoids the limitations of dedicated A, B, and DPTR registers by having completely symmetrical sources and destinations for all instructions. The RSC-4128 provides a high level of on-chip features and special DSP engines, providing a very cost effective mixed signal platform for general-purpose applications and development of custom algorithms. The full suite of industry standard tools for easy product development makes the RSC-4128 an ideal platform for consumer electronics ...

Page 4

... SRAM, or off-chip serial or parallel bus EEPROM, Flash Memory, or SRAM 100 templates can be recognized in an active set (the number of unique sets is limited only by programmable memory capacity). The RSC-4128 can store templates in on-chip SRAM. ...

Page 5

... Data Sheet RSC-4128 Architecture The RSC-4128 is a highly integrated speech and analog I/O mixed signal processor that combines: 8-bit microcontroller with enhanced instructions and interrupt control, superior register architecture, independent Digital Filter engine and “L1” Vector Math Accelerator On-chip ROM and RAM (4.8 Kbytes), and the ability to address off-chip RAM, ROM, EPROM or Flash. ...

Page 6

... If desired, the output speech or audio signal from the RSC-4128 is generated by a DAC for external amplification into a speaker PWM capable of directly driving a speaker at typical consumer product volumes. A typical product will require about $0.30 - $1.00 (in high volume) of additional components, in addition to the RSC-4128 ...

Page 7

... Optional. This capacitor MAY reduce noise coupled into the mic input on a noisy 2.2uF PCB. AVDD C14 2. If used, this capacitor MUST be placed close to the RSC-4128 AGND and MIC1IN pads. C13 .1 3. Place close to MICIN1. C15 4. These capacitors may be used to reduce high frequency response. The tradeoff is ...

Page 8

... RSC-4128 RSC-4128, Utilizing External Code and Data Memory 8 Schematic 1-2: P/N 80-0206-R Data Sheet © 2006 Sensory Inc. ...

Page 9

... Sensory also offers application development services. development tools and services, please contact Sensory. When using the RSC-4128 macro blocks such as the AFE, digital filters, L1, etc, for purposes other than as intended in the FluentChip™ technology modules, in applications that will also use FluentChip™ technologies, care must be taken to avoid conflicts that may cause adverse impact on functionality ...

Page 10

... Register and User RAM The RSC-4128 has a physical register RAM space of 896 bytes. There is an additional RAM space of 64 bytes dedicated to Special Function Registers (SFRs), for a total register RAM space of 960 bytes. User RAM is assigned 262 bytes of this register RAM space, as detailed below. ...

Page 11

... Digital Filter The RSC-4128 has a Digital Filter engine capable of dividing up a frequency range into several smaller ranges also capable of reporting characteristics of each range to the RSC-4128 processor. The configuration of the Digital Filter engine and access to signal characteristics generated are enabled by technology modules which are available from Sensory “ ...

Page 12

... When the class of sound selected by the programmer is detected by this circuitry a wakeup event will occur. (see the “Audio Wakeup” section for more information) General Purpose I/O The RSC-4128 has 24 general-purpose I/O pins (P0.0-P0.7, P1.0-P1.7, P2.0-P2.7). Each pin can be programmed as an input with weak pull-up (~200kΩ equivalent device); input with strong pull-up (~10kΩ equivalent device); input 12 ...

Page 13

... Port 1 Control Register B. Cleared by reset. 0E4H Read/Write P0[0:7] (port 0) output register. Cleared by reset. 0E5H Read Port 0 input. 0E6H Read/Write Port 0 Control Register A. Cleared by reset. 0E7H Read/Write Port 0 Control Register B. Cleared by reset. 13 Bits[4:0] set by reset P/N 80-0206-R RSC-4128 Control registers A and B together © 2006 Sensory Inc. ...

Page 14

... Constant/Code Space and Data Space. (“Constant” Space is referred to as “Const” space in assembly and C-Data space in C) Data Space can be read or written. Constant/Code Space is typically read-only. The RSC-4128 includes an external memory interface that allows connection with memory devices for storage of speaker-dependent speech recognition templates, audio record/playback data storage, extended durations of speech and music synthesis beyond the storage capabilities of on chip ROM, and code storage ...

Page 15

... MOVX reads access Constant/Code Space 1: MOVX reads access Data Space Cleared on reset. Bits [3:0] “eda” bits – extended address bits [19:16] used by MOVX to generate addresses bits A[19:16] of Data and/or Constant/Code Space. Cleared on reset. 15 P/N 80-0206-R RSC-4128 The upper addresses © 2006 Sensory Inc. ...

Page 16

... RSC-4128 The programming of the Extended Addressing Register (“extAdd”) is independent of whether the ROM is external or internal. That is, an external ROM mirrors an internal ROM exactly. This allows products to be developed with external ROM and masked with the same binary in an internal ROM part. ...

Page 17

... Kohm internal resistor when the “pdn” bit is set, to conserve current. One output, PDN, is active high when RSC-4128 is powered-down. This pin can be connected to the (active low) chip enable pins of external memory devices to reduce power consumption during RSC-4128 power-down. ...

Page 18

... RSC-4128 Access of external ROM space is always controlled by these wait state bits. Internal ROM space and all external R/W space accesses may also controlled by these bits, unless otherwise selected by bits in the clock extension register (register D6, “clkExt”) The internal RAMs always operate with zero wait states. ...

Page 19

... Data Sheet On-Chip ROM The RSC-4128 includes integrated on-chip ROM. This ROM is enabled when the –XM pin is tied , or pulled high by it’s own internal pullup resistor. This ROM space can combine both Code and Data. ROM code Security Feature The RSC-4128 has only one external memory enable pin (-XM), designed to prevent configuring code space for both internal and external memory ...

Page 20

... RSC4128 will begin running. Therefore, for fast response out of Sleep mode OSC1 should be enabled. Clocks The RSC-4128 uses a fully static core – the processor can be stopped (by removing the clock source) and restarted without causing a reset or losing contents of internal registers. Dynamic operation is guaranteed from ~1KHz to 14 ...

Page 21

... SLEEP modes. Timer2 and Audio Wakeup can run during Idle mode to produce a T2 Wakeup or Audio Wakeup. (see “Power and Wakeup Control” section) Timers/Counters Four programmable timers and one fixed timer in the RSC-4128 provide a variety of timing/counting options. Timers and the Multi-Tasking timer can all generate interrupts upon overflow. (See “Interrupts” section) Timers 1 and 3 Each of Timer1 (T1) and Timer3 (T3) consists of an 8-bit reload value register, an 8-bit up-counter, and a 4-bit decoded prescaler register ...

Page 22

... RSC-4128 Prescaler value Divisor 0000 1 0001 2 0010 4 0011 8 0100 16 0101 32 0110 64 0111 128 The resolution of T1 and bits, but the range is 23 bits. The longest interval that can be timed 2^15*256 clocks = 9.3 seconds. The 4-bit prescaler for the Clock Extensions Register, (register D6.Bits[3:0]). The 4-bit prescaler for the Timer3 Control Register (register D9 ...

Page 23

... Force load of Timer2 counter from reload register Timer3 Counter Reload (2's complement of period) Timer3 current counter value Force load of Timer3 counter from reload register th bit. A 2-bit decoded mux in the “sysCtl” register (register D5) allows selecting P/N 80-0206-R RSC-4128 This provides a © 2006 Sensory Inc. ...

Page 24

... Otherwise the watchdog circuit sets the “watch dog timed out” bit (register FB.Bit5) and generates a Timed Out Reset, which resets the RSC-4128. A Timed Out Reset disables the WDT. (See “Reset” section) Software in the reset routine can detect that the WDT timed out (FB.Bit5=1), since that is preserved during the Timed Out Reset. ...

Page 25

... Address 20H 25 st external interrupt request) and P0.2 (2 (Overflow of Timer 1) (Overflow of Timer 2) (Filter End Marker)(Reserved for Technology code) (Edge of P00) (Overflow of Timer 3) (Block End)(Reserved for Technology code) (Edge of P02) (Overflow of MT timer) P/N 80-0206-R RSC-4128 nd external interrupt © 2006 Sensory Inc. ...

Page 26

... Technology code use of these bits. In Idle mode, Timer2 continues to operate even when the rest of the RSC-4128 is powered-down. An overflow from Timer2 will set the corresponding “irq” flag even when there is no clock input to the processor. Note that the Timer2 “ ...

Page 27

... Data Sheet Analog Input The analog front end (AFE) for the RSC-4128 consists of a preamplifier with gain control, a 16-bit analog-to-digital converter, digital decimator and channel filters, and associated references. A single analog input can be processed through the AFE. All of this circuitry can be powered down to conserve battery life by programming register EF.Bit0 to “ ...

Page 28

... The 16 bit signal will have about 12.5 bits of dynamic range, with about 10 bits above the noise level. These samples are then provided to the RSC-4128 digital filter unit formatted as signed two’s-complement 16-bit values. The samples are stored in the digital filter input registers “adcSampleHi” (register F5) and “adcSampleLo” ...

Page 29

... NOTE 2 1N4148 NOTE 5 Recommended The RSC-4128 FluentChip™ library contains routines for detecting each of the four audio events listed above. These routines also manage powerdown appropriately. See the “FluentChip™ Technology Library Manual” for reference code to invoke these routines. Microphones A single electret microphone may be used both for the analog front-end input (for recognition purposes) and as the sound source for the Audio Wakeup unit ...

Page 30

... MHz PCLK). oscillator to stabilize and the PLL to lock before enabling the processor and the other RSC-4128 circuits. External reset clears the Global Interrupt Enable flag and begins execution at address 0h. The special function registers will be cleared, set, or left as-is, as detailed in the “ ...

Page 31

... Vdd/2- 1 LSB 1.497V Vdd/2 1.500V Vdd/2+ 1LSB 1.503V 2.994V Vdd- 1LSB 2.997V Analog Voltage output General 0-3V (approx) Vdd/4 0.750V Vdd/4+ 1 LSB 0.753V 0.756V 0.759V 0.762V Vdd/2- 1LSB 1.497V Vdd/2 1.500V Vdd/2+ 1LSB 1.503V 2.244V 3Vdd/4-1 LSB 2.247V © 2006 Sensory Inc. RSC-4128 ...

Page 32

... RSC-4128 Pulse Width Modulator (PWM) Analog Output The PWM consists of circuitry to regulate the width of a pulse supplied to one of two outputs, PWM0 and PWM1, over a period of programmable duration. One or the other of the two outputs is held at ground and the other is driven with a pulse of programmable duration, giving “push-pull” drive. Both outputs have “low shoot-thru” ...

Page 33

... Additional considerations using the PWM for 10-bit Data The 14.3 MHz CLK1 clock rate of the RSC-4128 is not fast enough to provide PWM synchronization with 10-bit 8kHz or 9.3 kHz data. To understand this, consider a PWM rate of 8 kHZ (125 microsec). To output 10 bits (9 bits plus sign) during this interval, a source must provide 512 clocks, giving a source rate of 125000/512 = 244 nsec ...

Page 34

... These multiplexing and selection operations will have settling times of approximately 10 microseconds. When the “pdn” bit is set for Idle or Sleep mode the entire comparator unit is powered down, but the contents of the “cmpCtl” and “cmpRef” registers are preserved. When the RSC-4128 wakes up the comparators resume normal operation. ...

Page 35

... Data Sheet Instruction Set Opcodes and Timing Details The RSC-4128 instruction set has 60 instructions comprising 13 move, 7 rotate/shift, 11 jump/branch, 13 register arithmetic, 9 immediate arithmetic, and 7 miscellaneous instructions. All instructions are 3 bytes or fewer, and no instruction requires more than 10 clock cycles (plus wait states) to execute. The column “Cycles” indicates the number of clock cycles required for each instruction when operating with zero wait states ...

Page 36

... RSC-4128 ROTATE Group Instructions Rotate group instructions apply only directly to register space SRAM locations. The carry flag is affected by these instructions, but the sign and zero flags are unaffected. Instruction Opcode Operand 1 Operand 2 Description RL 30 dest RR 31 dest RLC 32 dest RRC 33 dest ...

Page 37

... Watchdog timer P/N 80-0206-R RSC-4128 Bytes Cycles +Cycles/Waitstate ...

Page 38

... RSC-4128 Special Functions Registers (SFRs) Summary Address R/W Name Reset FF R/W flags ***** 0000 0000 FE R/W irq * 0000 0000 FD R/W imr **** 0000 0000 FC R/W bank 1110 0000 FB W RESERVED R sysStat 0000 0000 FA R/W dac 0000 0000 F9 R/W RESERVED F8 R/W RESERVED F7 R/W stkData 0000 0000 F6 R/W stkNdx 0000 0000 F5 W RESERVED R adcSampleHi 0000 0000 ...

Page 39

... A read-modify-write action should be used to modify the registers to avoid changing these bits. ***** “trap” must always be written as “0” in the “flags” and “flagsHold” registers 39 Bit 7 Bit 6 Bit 5 Bit 4 pwrl detect thrh2 thrh1 P/N 80-0206-R RSC-4128 Bit 3 Bit 2 Bit 1 Bit 0 thrh0 thrl2 thrl1 © 2006 Sensory Inc. thrl0 ...

Page 40

... RSC-4128 DC Characteristics Operating Conditions (T = 0°C to +70° SYMBOL PARAMETER V Input Low Voltage IL V Input High Voltage IH I Input Leakage Current IL I Supply Current, Active ACT Supply Current, Active I ACT I Supply Current, Idle without Audio IDLE Wakeup Supply Current, Idle with Audio ...

Page 41

... TALWAX TWDVAV TWHQX -0.1V to +4.0V WARNING: -65°C to +150°C Stressing the RSC-4128 beyond the “Absolute Maximum Ratings” may cause permanent damage. -40°C to +85°C These are stress ratings only. Operation beyond the “Operating Conditions” is not 260°C for 10 sec recommended and extended exposure beyond the “ ...

Page 42

... RSC-4128 Package Options The RSC-4128 can be purchased in 100-lead LQFP or in unpackaged die. When using an in circuit emulator (ICE) on dice applications, a COB bonding pad ring equivalent to a 100-lead LQFP footprint is advised for easy ICE adapter attachment. DIE 100 82 1 RSC-4128 (100 pad DIE) ...

Page 43

... External Memory Address Bus (NC for 64-lead LQFP) Output, 100k pull-up resistor; high-Z General Purpose I/O that can act as a “wake-up” input I/O, 10k or 200k pull-up resistor; high-Z Not connected External Memory Address Bus P/N 80-0206-R RSC-4128 Signal Type I/O, 10k or 200k pull-up resistor; high-Z I/O, 10k or 200k pull-up resistor; high-Z I/O, 10k or 200k pull-up resistor; high-Z GND I/O, 10k or 200k pull-up resistor ...

Page 44

... RSC-4128 DIE ----------- 100 LQFP Pin Name Description Pad # Pin # P0.1 100 100 NC 44 General Purpose I/O that can act as a “wake-up” input I/O, 10k or 200k pull-up resistor; high-Z External Memory Address Bus (NC for 64-lead LQFP) Output, 100k pull-up resistor; high-Z Not connected General Purpose I/O that can act as a “ ...

Page 45

... GND 21 GND 22 VDD 23 VDD 24 P2.6 25 reserved 26 P2.5 27 reserved 28 -reset P/N 80-0206-R RSC-4128 VDD 75 VDD 74 GND 73 GND 72 A10 71 P1.1 70 A11 69 P1.2 68 A12 67 P1 ...

Page 46

... RSC-4128 RSC-4128 Die Bonding Pad Locations PAD # PADNAME X (um) Y (um) PAD # 1 P0.0 95 4564 4412 4260 32 4 PDN 95 4107 3955 3803 35 7 GND 95 3651 36 8 GND 95 3498 37 9 XO1 95 3346 38 10 XI1 95 3251 39 11 ...

Page 47

... Data Sheet Mechanical Data LQFP 100 PLASTICQUAD FLATPACK (14x14x1.4 mm) 47 P/N 80-0206-R RSC-4128 © 2006 Sensory Inc. ...

Page 48

... TYP A. B. 12º TYP C. Description Tested, Singulated RSC-4128 die in waffle pack RSC-4128 100 pin 1.4 mm LQFP P/N 80-0206-R All linear dimensions are in millimeters. This drawing is subject to change without notice. Falls within JEDEC MS-026 BBC © 2006 Sensory Inc. Data Sheet ...

Page 49

... N. Pastoria Ave., Sunnyvale, CA 94085 Tel: (408) 625-3300 Fax: (408) 625-3350 © 2006 SENSORY, INC. ALL RIGHTS RESERVED. Sensory is registered by the U.S. Patent and Trademark Office. All other trademarks or registered trademarks are the property of their respective owners. www.sensoryinc.com RSC-4128 ...

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