PIC12F675T-E/MF Microchip Technology, PIC12F675T-E/MF Datasheet - Page 20
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PIC12F675T-E/MF
Manufacturer Part Number
PIC12F675T-E/MF
Description
IC MCU CMOS 1K FLASH W/AD 8-DFN
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F629T-ISN.pdf
(136 pages)
2.PIC12F629T-ISN.pdf
(8 pages)
3.PIC12F629T-ISN.pdf
(24 pages)
Specifications of PIC12F675T-E/MF
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DFN
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFNXLT08DFN - SOCKET TRANSITION ICE 8DFNAC164032 - ADAPTER PICSTART PLUS 8DFN/DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Other names
PIC12F675-E/MFTR
PIC12F675-E/MFTR
PIC12F675T-E/MFTR
PIC12F675-E/MFTR
PIC12F675T-E/MFTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12F675T-E/MF
Manufacturer:
Microchip
Quantity:
5 029
PIC12F629/675/PIC16F630/676
4.3
4.3.1
Checksum is calculated by reading the contents of the
PIC12F629/675/PIC16F630/676 memory locations and
adding up the opcodes to the maximum user
addressable location (e.g., 0x3FE for the PIC12F629/
675/PIC16F630/676). Any carry bits exceeding 16 bits
are
(appropriately masked) is added to the checksum.
Checksum computation for the devices is shown in
Table 4-1.
The checksum is calculated by summing the following:
• The contents of all program memory locations.
• The Configuration Word, appropriately masked.
• Masked ID locations (when applicable).
The 16 LSbs of this sum is the checksum.
The following table describes how to calculate the
checksum for each device.
TABLE 4-1:
4.3.2
The programmer should be able to read data EEPROM
information from a hex file and conversely (as an option),
write data EEPROM contents to a hex file, along with
program memory information and fuse information.
The 128 data memory locations are logically mapped
starting at address 0x2100. The format for data memory
storage is one data byte per address location, LSb
aligned.
DS41191D-page 20
PIC12F629/675/
PIC16F630/676
Legend: CFGW = Configuration Word
Device
neglected.
Checksum Computation
SUM[a:b] = [Sum of locations a to b inclusive]
SUM_ID = ID locations masked by 0xF then made into a 16-bit value with ID0 as the Most Significant
nibble.
For example: ID0 = 0x1, ID1 = 0x2, ID3 = 0x3, ID4 = 0x4, then SUM_ID = 0x1234
*Checksum = [Sum of all the individual expressions] MODULO [0xFFFF]
+ = Addition
& = Bitwise AND
CHECKSUM
EMBEDDING DATA EEPROM
CONTENTS IN HEX FILE
CHECKSUM COMPUTATION
Finally,
Code-Protect
OFF
ALL
the
Configuration
SUM[0x0000:0x3FE] + CFGW & 01FF
CFGW & 0x01FF + SUM_ID
Word
Checksum
*
Note 1: The
2: Some older devices have an additional
depending on the code-protect setting.
Since the program memory locations read
out differently depending on the code-
protect setting, Table 4-1 describes how to
manipulate the actual program memory
values to simulate the values that would
be read from a protected device. When
calculating a checksum by reading a
device, the entire program memory can
simply be read and summed. The
Configuration Word and ID locations can
always be read.
value added in the checksum. This is to
maintain compatibility with older device
programmer checksums.
checksum
Blank
Value
© 2005 Microchip Technology Inc.
BE00
BF7F
calculation
0x25E6 at 0 and
Max. Address
89CE
8B4D
differs