PIC12F675-I/SN Microchip Technology, PIC12F675-I/SN Datasheet - Page 40

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PIC12F675-I/SN

Manufacturer Part Number
PIC12F675-I/SN
Description
IC MCU CMOS FLSH-BASE 8BIT 8SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F675-I/SN

Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
8-SOIC (3.9mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
5
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS- 232/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 53270-913
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
PIC12F629/675
6.3
A simplified circuit for an analog input is shown in
Figure 6-3. Since the analog pins are connected to a
digital output, they have reverse biased diodes to V
and V
V
FIGURE 6-3:
6.4
The comparator output, COUT, is read through the
CMCON register. This bit is read only. The comparator
output may also be directly output to the GP2 pin in
three of the eight possible modes, as shown in
Figure 6-2. When in one of these modes, the output on
GP2 is asynchronous to the internal clock. Figure 6-4
shows the comparator output block diagram.
FIGURE 6-4:
DS41190C-page 38
SS
and V
SS
. The analog input, therefore, must be between
Analog Input Connection
Considerations
Comparator Output
To GP2/T0CKI pin
DD
. If the input voltage deviates from this
VA
Legend:
To Data Bus
Rs < 10K
Set CMIF bit
ANALOG INPUT MODE
MODIFIED COMPARATOR OUTPUT BLOCK DIAGRAM
RD CMCON
A
IN
C
V
I
R
R
VA
LEAKAGE
T
PIN
IC
S
C
5 pF
PIN
= Input Capacitance
= Threshold Voltage
= Leakage Current at the pin due to Various Junctions
= Interconnect Resistance
= Source Impedance
= Analog Voltage
Q
Q
DD
V
DD
EN
EN
V
V
D
D
T
T
= 0.6V
= 0.6V
RESET
range by more than 0.6V in either direction, one of the
diodes is forward biased and a latchup may occur. A
maximum
recommended for the analog sources. Any external
component connected to an analog input pin, such as
a capacitor or a Zener diode, should have very little
leakage current.
The TRISIO<2> bit functions as an output enable/
disable for the GP2 pin while the comparator is in an
Output mode.
RD CMCON
Note 1: When reading the GPIO register, all pins
2: Analog levels on any pin that is defined as
Leakage
±500 nA
Vss
configured as analog inputs will read as a
‘0’. Pins configured as digital inputs will
convert an analog input according to the
TTL input specification.
a digital input, may cause the input buffer
to consume more current than is
specified.
source
CINV
R
IC
impedance
 2003 Microchip Technology Inc.
CM2:CM0
GP0/CIN+
GP1/CIN-
CV
of
REF
10 kΩ
is

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