PIC16F630-I/SL Microchip Technology, PIC16F630-I/SL Datasheet - Page 76

IC MCU FLASH 1KX14 EEPROM 14SOIC

PIC16F630-I/SL

Manufacturer Part Number
PIC16F630-I/SL
Description
IC MCU FLASH 1KX14 EEPROM 14SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F630-I/SL

Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS- 232/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Package
14SOIC N
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC16F630/676
CALL
Syntax:
Operands:
Operation:
Status Affected:
Description:
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
CLRW
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS40039F-page 76
Call Subroutine
[ label ] CALL k
0  k  2047
(PC)+ 1 TOS,
k  PC<10:0>,
(PCLATH<4:3>)  PC<12:11>
None
Call Subroutine. First, return
address (PC + 1) is pushed onto
the stack. The eleven-bit immedi-
ate address is loaded into PC bits
<10:0>. The upper bits of the PC
are loaded from PCLATH. CALL is
a two-cycle instruction.
Clear W
[ label ] CLRW
None
00h  (W)
1  Z
Z
W register is cleared. Zero bit (Z)
is set.
Clear f
[label] CLRF
0  f  127
00h  (f)
1  Z
Z
The contents of register ‘f’ are
cleared and the Z bit is set.
f
CLRWDT
Syntax:
Operands:
Operation:
Status Affected:
Description:
COMF
Syntax:
Operands:
Operation:
Status Affected:
Description:
DECF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Complement f
(f)  (destination)
Z
TO, PD
[ label ] COMF
0  f  127
d  [0,1]
The contents of register ‘f’ are
complemented. If ‘d’ is 0, the
result is stored in W. If ‘d’ is 1, the
result is stored back in register ‘f’.
Decrement f
[label] DECF f,d
0  f  127
d  [0,1]
(f) - 1  (destination)
Z
Decrement register ‘f’. If ‘d’ is 0,
the result is stored in the W
register. If ‘d’ is 1, the result is
stored back in register ‘f’.
Clear Watchdog Timer
[ label ] CLRWDT
None
00h  WDT
0  WDT prescaler,
1  TO
1  PD
CLRWDT instruction resets the
Watchdog Timer. It also resets the
prescaler of the WDT.
Status bits TO and PD are set.
 2010 Microchip Technology Inc.
f,d

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