PIC16F677-I/SO Microchip Technology, PIC16F677-I/SO Datasheet - Page 127
![IC PIC MCU FLASH 2KX14 20SOIC](/photos/6/64/66480/150-20-soic_sml.jpg)
PIC16F677-I/SO
Manufacturer Part Number
PIC16F677-I/SO
Description
IC PIC MCU FLASH 2KX14 20SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F690DM-PCTLHS.pdf
(306 pages)
3.PIC16F677-IP.pdf
(2 pages)
4.PIC16F677-IP.pdf
(16 pages)
5.PIC16F677-ISO.pdf
(294 pages)
Specifications of PIC16F677-I/SO
Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
20-SOIC (7.5mm Width)
Mfg Application Notes
Intro to Capacitive Sensing Appl Notes Layout and Physical Design Appl Note
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
17
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162061 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOIC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F690DM-PCTLHS PDF datasheet #2
- PIC16F677-IP PDF datasheet #3
- PIC16F677-IP PDF datasheet #4
- PIC16F677-ISO PDF datasheet #5
- Current page: 127 of 306
- Download datasheet (6Mb)
10.2
Depending on the application, good programming
practice may dictate that the value written to the data
EEPROM should be verified (see Example 10-4) to the
desired value to be written.
EXAMPLE 10-4:
10.2.1
The data EEPROM is a high-endurance, byte
addressable array that has been optimized for the
storage of frequently changing information (e.g.,
program variables or other data that are updated often).
When variables in one section change frequently, while
variables in another section do not change, it is possible
to exceed the total number of write cycles to the
EEPROM (specification D124) without exceeding the
total number of write cycles to a single byte
(specifications D120 and D120A). If this is the case,
then a refresh of the array must be performed. For this
reason, variables that do not change (such as
constants, IDs, calibration, etc.) should be stored in
Flash program memory.
10.3
There are conditions when the user may not want to
write to the data EEPROM memory. To protect against
spurious EEPROM writes, various mechanisms have
been built in. On power-up, WREN is cleared. Also, the
Power-up
EEPROM write.
The write initiate sequence and the WREN bit together
help prevent an accidental write during:
• Brown-out
• Power Glitch
• Software Malfunction
10.4
Data memory can be code-protected by programming
the CPD bit in the Configuration Word register
(Register 14-1) to ‘0’.
© 2008 Microchip Technology Inc.
BANKSEL EEDAT
MOVF
BANKSEL EECON1
BSF
BANKSEL EEDAT
XORWF
BTFSS
GOTO
:
BANKSEL 0x00
Write Verify
Protection Against Spurious Write
Data EEPROM Operation During
Code-Protect
EEDAT, W
EECON1, RD
EEDAT, W
STATUS, Z
WRITE_ERR
USING THE DATA EEPROM
Timer
WRITE VERIFY
(64 ms
;
;EEDAT not changed
;from previous write
;
;YES, Read the
;value written
;
;
;Is data the same
;No, handle error
;Yes, continue
;Bank 0
duration)
PIC16F631/677/685/687/689/690
prevents
When the data memory is code-protected, only the CPU
is able to read and write data to the data EEPROM. It is
recommended to code-protect the program memory
when code-protecting data memory and programming
unused program memory with NOP instructions.
DS41262E-page 125
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