AT89LS52-16JU Atmel, AT89LS52-16JU Datasheet - Page 22

IC MCU 8K FLASH 16MHZ 44-PLCC

AT89LS52-16JU

Manufacturer Part Number
AT89LS52-16JU
Description
IC MCU 8K FLASH 16MHZ 44-PLCC
Manufacturer
Atmel
Series
89LSr
Datasheet

Specifications of AT89LS52-16JU

Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 4 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89ISP
Minimum Operating Temperature
- 40 C
Cpu Family
89LS
Device Core
8051
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
256Byte
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
4V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
Package
44PLCC
Family Name
89LS
Maximum Speed
16 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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19. Programming the Flash – Serial Mode
22
AT89LS52
Data Polling: The AT89LS52 features Data Polling to indicate the end of a byte write cycle. Dur-
ing a write cycle, an attempted read of the last byte written will result in the complement of the
written data on P0.7. Once the write cycle has been completed, true data is valid on all outputs,
and the next cycle may begin. Data Polling may begin any time after a write cycle has been
initiated.
Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output
signal. P3.0 is pulled low after ALE goes high during programming to indicate BUSY. P3.0 is
pulled high again when programming is done to indicate READY.
Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code
data can be read back via the address and data lines for verification. The status of the individ-
ual lock bits can be verified directly by reading them back.
Reading the Signature Bytes: The signature bytes are read by the same procedure as a nor-
mal verification of locations 000H, 100H, and 200H, except that P3.6 and P3.7 must be pulled to
a logic low. The values returned are as follows.
Chip Erase: In the parallel programming mode, a chip erase operation is initiated by using the
proper combination of control signals and by pulsing ALE/PROG low for a duration of 200 ns -
500 ns.
In the serial programming mode, a chip erase operation is initiated by issuing the Chip Erase
instruction. In this mode, chip erase is self-timed and takes about 500 ms.
During chip erase, a serial read from any address location will return 00H at the data output.
The Code memory array can be programmed using the serial ISP interface while RST is pulled
to V
set high, the Programming Enable instruction needs to be executed first before other operations
can be executed. Before a reprogramming sequence can occur, a Chip Erase operation is
required.
The Chip Erase operation turns the content of every memory location in the Code array into
FFH.
Either an external system clock can be supplied at pin XTAL1 or a crystal needs to be connected
across pins XTAL1 and XTAL2. The maximum serial clock (SCK) frequency should be less than
1/16 of the crystal frequency. With a 16 MHz oscillator clock, the maximum SCK frequency is 1
MHz.
CC
. The serial interface consists of pins SCK, MOSI (input) and MISO (output). After RST is
(000H) = 1EH indicates manufactured by Atmel
(100H) = 62H indicates 89LS52
(200H) = 06H
2601C–MICRO–06/08

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